From patchwork Thu Nov 19 15:53:42 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Weseloh X-Patchwork-Id: 546543 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46EBE14140E for ; Fri, 20 Nov 2015 02:54:20 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=qSiWmxRk; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934484AbbKSPx7 (ORCPT ); Thu, 19 Nov 2015 10:53:59 -0500 Received: from mail-wm0-f50.google.com ([74.125.82.50]:38780 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934069AbbKSPx4 (ORCPT ); Thu, 19 Nov 2015 10:53:56 -0500 Received: by wmec201 with SMTP id c201so123882078wme.1; Thu, 19 Nov 2015 07:53:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IZcFwQYjYO8iYctb6OMEcskBhYts5HJQgUUvOI4Y19o=; b=qSiWmxRkZszcMHXpTmaVCFB3NQ1PzJ7eDiOPxUc7fqiJ2b6y3Reoymz46Fk0beL55s 0KkgLZi0Ppec+222qGpJAjiKfW1cxKJD5MO+sTvidK46WxUS427v/xX6fLc9X6mb9O5s ZDHJiJIbel6uaczB4lEmZYTA9MeDreWGCa7oLD5CnmMpeVxdxjULI7ZVvrvEak0KU9yb hRNx6nzabUz9u1wb4aru3YjXa4O1dA3XIGPD3JmPNTN2lOQfAPsMmf5zkYq513mtQ+ji nwYo94TyXDPr8yU49yELk6p52EE5VV6EhbynGcD5BuIIHuZJkMH8d38VTDISA5GyKcf4 VdZQ== X-Received: by 10.194.91.234 with SMTP id ch10mr10199264wjb.69.1447948434812; Thu, 19 Nov 2015 07:53:54 -0800 (PST) Received: from speedy.fritz.box (p578E993C.dip0.t-ipconnect.de. [87.142.153.60]) by smtp.gmail.com with ESMTPSA id u17sm8965000wmd.8.2015.11.19.07.53.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 19 Nov 2015 07:53:53 -0800 (PST) From: Marcus Weseloh To: linux-sunxi@googlegroups.com Cc: Marcus Weseloh , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Maxime Ripard , Mark Brown , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: [PATCH] spi: dts: sun4i: Add support for inter-word wait cycles using the SPI Wait Clock Register Date: Thu, 19 Nov 2015 16:53:42 +0100 Message-Id: <1447948422-4915-2-git-send-email-mweseloh42@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1447948422-4915-1-git-send-email-mweseloh42@gmail.com> References: <1447948422-4915-1-git-send-email-mweseloh42@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds support and documentation for a new slave device property "sun4i,spi-wdelay" that allows to set the SPI Wait Clock Register per device / transfer. The SPI hardware will wait the specified amount of SPI clock periods (plus a constant 3 clock periods) before transmitting the next word. The constant additional 3 clock periods are not documented by the vendor and have been determined by analyzing the generated waveforms across many different transmission speeds. Signed-off-by: Marcus Weseloh --- Documentation/devicetree/bindings/spi/spi-sun4i.txt | 11 +++++++++++ drivers/spi/spi-sun4i.c | 7 +++++++ 2 files changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-sun4i.txt b/Documentation/devicetree/bindings/spi/spi-sun4i.txt index de827f5..9c4d723 100644 --- a/Documentation/devicetree/bindings/spi/spi-sun4i.txt +++ b/Documentation/devicetree/bindings/spi/spi-sun4i.txt @@ -10,6 +10,10 @@ Required properties: - "mod": the parent module clock - clock-names: Must contain the clock names described just above +Optional properties for slave devices: +- sun4i,spi-wdelay : delay between transmission of words, specified in number + of SPI clock periods (actual delay is wdelay + 3 clock periods) + Example: spi1: spi@01c06000 { @@ -21,4 +25,11 @@ spi1: spi@01c06000 { status = "disabled"; #address-cells = <1>; #size-cells = <0>; + + spi1_0 { + compatible = "example,dummy"; + reg = <0>; + spi-max-frequency = <1000000>; /* 1Mhz = 1us clock period */ + sun4i,spi-wdelay = <2>; /* delay 5us (2 + 3 clock periods) */ + }; }; diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index f60a6d6..a8e39f1 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -173,6 +174,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master, unsigned int tx_len = 0; int ret = 0; u32 reg; + u32 wdelay = 0; /* We don't support transfer larger than the FIFO */ if (tfr->len > SUN4I_FIFO_DEPTH) @@ -261,6 +263,11 @@ static int sun4i_spi_transfer_one(struct spi_master *master, sun4i_spi_write(sspi, SUN4I_CLK_CTL_REG, reg); + /* Set optional inter-word wait cycles */ + of_property_read_u32(spi->dev.of_node, "sun4i,spi-wdelay", + &wdelay); + sun4i_spi_write(sspi, SUN4I_WAIT_REG, (u16)wdelay); + /* Setup the transfer now... */ if (sspi->tx_buf) tx_len = tfr->len;