From patchwork Fri Sep 25 14:56:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 522883 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id B9477140783 for ; Sat, 26 Sep 2015 00:57:28 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756803AbbIYO5T (ORCPT ); Fri, 25 Sep 2015 10:57:19 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:12413 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756759AbbIYO5Q (ORCPT ); Fri, 25 Sep 2015 10:57:16 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Fri, 25 Sep 2015 07:57:16 -0700 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Fri, 25 Sep 2015 07:51:01 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Fri, 25 Sep 2015 07:51:01 -0700 Received: from jonathanh-lm.nvidia.com (172.20.144.16) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.342.0; Fri, 25 Sep 2015 07:57:15 -0700 From: Jon Hunter To: Laxman Dewangan , Vinod Koul , Stephen Warren , Thierry Reding , Alexandre Courbot , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala CC: , , , Jon Hunter Subject: [PATCH 2/3] Documentation: DT: Add binding documentation for NVIDIA ADMA Date: Fri, 25 Sep 2015 15:56:39 +0100 Message-ID: <1443193000-457-3-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1443193000-457-1-git-send-email-jonathanh@nvidia.com> References: <1443193000-457-1-git-send-email-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device-tree binding documentation for the Tegra210 Audio DMA controller. Signed-off-by: Jon Hunter --- .../devicetree/bindings/dma/tegra210-adma.txt | 47 ++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/tegra210-adma.txt diff --git a/Documentation/devicetree/bindings/dma/tegra210-adma.txt b/Documentation/devicetree/bindings/dma/tegra210-adma.txt new file mode 100644 index 000000000000..af04b3c5a557 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/tegra210-adma.txt @@ -0,0 +1,47 @@ +* NVIDIA Tegra Audio DMA controller + +Required properties: +- compatible: Should be "nvidia,-adma" +- reg: Should contain DMA registers location and length. This should include + all of the per-channel registers. +- interrupt-parent: Phandle to the interrupt parent controller. +- interrupts: Should contain all of the per-channel DMA interrupts. +- clocks: Must contain two entries, one for the power-domain clock and one + for the module clock. See ../clocks/clock-bindings.txt for details. +- dma-channels: Number of DMA channels supported by the controller. +- #dma-cells : Must be <0>. + +Examples: + +adma: adma@702e2000 { + compatible = "nvidia,tegra210-adma"; + reg = <0x0 0x702e2000 0x0 0x2000>; + interrupt-parent = <&tegra_agic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>, + <&tegra_car TEGRA210_CLK_ADMA_APE>; + clock-names = "adma", "adma.ape"; + dma-channels = <22>; + #dma-cells = <0>; +};