From patchwork Tue Aug 4 08:16:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Liao X-Patchwork-Id: 503380 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 01DBF14028F for ; Tue, 4 Aug 2015 18:19:06 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932475AbbHDIRk (ORCPT ); Tue, 4 Aug 2015 04:17:40 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:36806 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S932451AbbHDIRh (ORCPT ); Tue, 4 Aug 2015 04:17:37 -0400 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 940035763; Tue, 04 Aug 2015 16:17:34 +0800 Received: from mtksdtcf04.mediatek.inc (10.21.12.144) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Tue, 4 Aug 2015 16:17:33 +0800 From: James Liao To: Matthias Brugger , Mike Turquette , Stephen Boyd , Heiko Stubner CC: , Daniel Kurtz , Ricky Liang , Rob Herring , Sascha Hauer , , , , , James Liao Subject: [PATCH v6 6/9] dt-bindings: ARM: Mediatek: Document devicetree bindings for clock controllers Date: Tue, 4 Aug 2015 16:16:55 +0800 Message-ID: <1438676218-11310-7-git-send-email-jamesjj.liao@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1438676218-11310-1-git-send-email-jamesjj.liao@mediatek.com> References: <1438676218-11310-1-git-send-email-jamesjj.liao@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the binding documentation for the mmsys, imgsys, vdecsys, vencsys and vencltsys controllers found on Mediatek SoCs. Signed-off-by: James Liao --- .../bindings/arm/mediatek/mediatek,imgsys.txt | 22 ++++++++++++++++++++++ .../bindings/arm/mediatek/mediatek,mmsys.txt | 22 ++++++++++++++++++++++ .../bindings/arm/mediatek/mediatek,vdecsys.txt | 22 ++++++++++++++++++++++ .../bindings/arm/mediatek/mediatek,vencltsys.txt | 22 ++++++++++++++++++++++ .../bindings/arm/mediatek/mediatek,vencsys.txt | 22 ++++++++++++++++++++++ 5 files changed, 110 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vencltsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt new file mode 100644 index 0000000..b1f2ce1 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt @@ -0,0 +1,22 @@ +Mediatek imgsys controller +============================ + +The Mediatek imgsys controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be: + - "mediatek,mt8173-imgsys", "syscon" +- #clock-cells: Must be 1 + +The imgsys controller uses the common clk binding from +Documentation/devicetree/bindings/clock/clock-bindings.txt +The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +Example: + +imgsys: clock-controller@15000000 { + compatible = "mediatek,mt8173-imgsys", "syscon"; + reg = <0 0x15000000 0 0x1000>; + #clock-cells = <1>; +}; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt new file mode 100644 index 0000000..4385946 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -0,0 +1,22 @@ +Mediatek mmsys controller +============================ + +The Mediatek mmsys controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be: + - "mediatek,mt8173-mmsys", "syscon" +- #clock-cells: Must be 1 + +The mmsys controller uses the common clk binding from +Documentation/devicetree/bindings/clock/clock-bindings.txt +The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +Example: + +mmsys: clock-controller@14000000 { + compatible = "mediatek,mt8173-mmsys", "syscon"; + reg = <0 0x14000000 0 0x1000>; + #clock-cells = <1>; +}; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt new file mode 100644 index 0000000..1faacf1 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt @@ -0,0 +1,22 @@ +Mediatek vdecsys controller +============================ + +The Mediatek vdecsys controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be: + - "mediatek,mt8173-vdecsys", "syscon" +- #clock-cells: Must be 1 + +The vdecsys controller uses the common clk binding from +Documentation/devicetree/bindings/clock/clock-bindings.txt +The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +Example: + +vdecsys: clock-controller@16000000 { + compatible = "mediatek,mt8173-vdecsys", "syscon"; + reg = <0 0x16000000 0 0x1000>; + #clock-cells = <1>; +}; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencltsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencltsys.txt new file mode 100644 index 0000000..3cc299f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencltsys.txt @@ -0,0 +1,22 @@ +Mediatek vencltsys controller +============================ + +The Mediatek vencltsys controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be: + - "mediatek,mt8173-vencltsys", "syscon" +- #clock-cells: Must be 1 + +The vencltsys controller uses the common clk binding from +Documentation/devicetree/bindings/clock/clock-bindings.txt +The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +Example: + +vencltsys: clock-controller@19000000 { + compatible = "mediatek,mt8173-vencltsys", "syscon"; + reg = <0 0x19000000 0 0x1000>; + #clock-cells = <1>; +}; diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt new file mode 100644 index 0000000..5bb2866 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt @@ -0,0 +1,22 @@ +Mediatek vencsys controller +============================ + +The Mediatek vencsys controller provides various clocks to the system. + +Required Properties: + +- compatible: Should be: + - "mediatek,mt8173-vencsys", "syscon" +- #clock-cells: Must be 1 + +The vencsys controller uses the common clk binding from +Documentation/devicetree/bindings/clock/clock-bindings.txt +The available clocks are defined in dt-bindings/clock/mt*-clk.h. + +Example: + +vencsys: clock-controller@18000000 { + compatible = "mediatek,mt8173-vencsys", "syscon"; + reg = <0 0x18000000 0 0x1000>; + #clock-cells = <1>; +};