From patchwork Sun May 24 15:11:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 475980 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 55DEF1401B5 for ; Mon, 25 May 2015 01:30:59 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752253AbbEXPa4 (ORCPT ); Sun, 24 May 2015 11:30:56 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:4922 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752284AbbEXPay (ORCPT ); Sun, 24 May 2015 11:30:54 -0400 Received: from KLMAIL01.kl.imgtec.org (unknown [192.168.5.35]) by Websense Email Security Gateway with ESMTPS id F0FAB8EF1C706; Sun, 24 May 2015 16:30:49 +0100 (IST) Received: from LEMAIL01.le.imgtec.org (192.168.152.62) by KLMAIL01.kl.imgtec.org (192.168.5.35) with Microsoft SMTP Server (TLS) id 14.3.195.1; Sun, 24 May 2015 16:29:51 +0100 Received: from localhost (192.168.159.140) by LEMAIL01.le.imgtec.org (192.168.152.62) with Microsoft SMTP Server (TLS) id 14.3.210.2; Sun, 24 May 2015 16:29:43 +0100 From: Paul Burton To: CC: Paul Burton , Ian Campbell , Kumar Gala , Lars-Peter Clausen , Mark Rutland , Pawel Moll , Rob Herring , , Subject: [PATCH v5 33/37] devicetree: document Ingenic SoC UART binding Date: Sun, 24 May 2015 16:11:43 +0100 Message-ID: <1432480307-23789-34-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.4.1 In-Reply-To: <1432480307-23789-1-git-send-email-paul.burton@imgtec.com> References: <1432480307-23789-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.159.140] Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding documentation for the UARTs found in Ingenic SoCs. Signed-off-by: Paul Burton Acked-by: Rob Herring Cc: Ian Campbell Cc: Kumar Gala Cc: Lars-Peter Clausen Cc: Mark Rutland Cc: Pawel Moll Cc: Rob Herring Cc: devicetree@vger.kernel.org --- Changes in v5: None Changes in v4: None Changes in v3: - Merge binding documentation for Ingenic SoCs whose bindings differ only by their compatible strings. Changes in v2: None .../devicetree/bindings/serial/ingenic,uart.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/ingenic,uart.txt diff --git a/Documentation/devicetree/bindings/serial/ingenic,uart.txt b/Documentation/devicetree/bindings/serial/ingenic,uart.txt new file mode 100644 index 0000000..c2d3b3a --- /dev/null +++ b/Documentation/devicetree/bindings/serial/ingenic,uart.txt @@ -0,0 +1,22 @@ +* Ingenic SoC UART + +Required properties: +- compatible : "ingenic,jz4740-uart" or "ingenic,jz4780-uart" +- reg : offset and length of the register set for the device. +- interrupts : should contain uart interrupt. +- clocks : phandles to the module & baud clocks. +- clock-names: tuple listing input clock names. + Required elements: "baud", "module" + +Example: + +uart0: serial@10030000 { + compatible = "ingenic,jz4740-uart"; + reg = <0x10030000 0x100>; + + interrupt-parent = <&intc>; + interrupts = <9>; + + clocks = <&ext>, <&cgu JZ4740_CLK_UART0>; + clock-names = "baud", "module"; +};