From patchwork Thu Mar 26 05:37:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jianwei Wang X-Patchwork-Id: 454878 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 7B3461400B7 for ; Thu, 26 Mar 2015 16:40:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750722AbbCZFki (ORCPT ); Thu, 26 Mar 2015 01:40:38 -0400 Received: from mail-bn1bon0118.outbound.protection.outlook.com ([157.56.111.118]:26144 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750843AbbCZFkg (ORCPT ); Thu, 26 Mar 2015 01:40:36 -0400 Received: from BY2PR03CA011.namprd03.prod.outlook.com (10.255.93.28) by BY1PR0301MB0869.namprd03.prod.outlook.com (25.160.194.14) with Microsoft SMTP Server (TLS) id 15.1.125.19; Thu, 26 Mar 2015 05:40:31 +0000 Received: from BN1BFFO11FD009.protection.gbl (10.255.93.4) by BY2PR03CA011.outlook.office365.com (10.255.93.28) with Microsoft SMTP Server (TLS) id 15.1.125.19 via Frontend Transport; Thu, 26 Mar 2015 05:40:31 +0000 Received: from tx30smr01.am.freescale.net ([192.88.168.50]) by BN1BFFO11FD009.mail.protection.outlook.com ([10.58.144.72]) with Microsoft SMTP Server (TLS) id 15.1.130.10 via Frontend Transport; Thu, 26 Mar 2015 05:40:30 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id t2Q5eJ7r013046; Wed, 25 Mar 2015 22:40:21 -0700 From: Jianwei Wang To: , , CC: , , , , "Jianwei Wang" , Alison Wang , Xiubo Li Subject: [PATCH v3 1/4] drm/layerscape: Add Freescale DCU DRM driver Date: Thu, 26 Mar 2015 13:37:02 +0800 Message-ID: <1427348225-40731-1-git-send-email-b52261@freescale.com> X-Mailer: git-send-email 2.1.0.27.g96db324 MIME-Version: 1.0 X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=b52261@freescale.com; cmss.chinamobile.com; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; BMV:1; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(199003)(189002)(5890100001)(5820100001)(19580395003)(77156002)(62966003)(105606002)(85426001)(19580405001)(23676002)(50226001)(36756003)(229853001)(106466001)(33646002)(46102003)(87936001)(2201001)(47776003)(575784001)(50466002)(50986999)(77096005)(92566002)(217873001)(42262002)(579004); DIR:OUT; SFP:1102; SCL:1; SRVR:BY1PR0301MB0869; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv; A:1; MX:1; LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR0301MB0869; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5002010)(5005006); SRVR:BY1PR0301MB0869; BCL:0; PCL:0; RULEID:; SRVR:BY1PR0301MB0869; X-Forefront-PRVS: 0527DFA348 X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Mar 2015 05:40:30.4655 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR0301MB0869 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch add support for Two Dimensional Animation and Compositing Engine (2D-ACE) on the Freescale SoCs. 2D-ACE is a Freescale display controller. 2D-ACE describes the functionality of the module extremely well its name is a value that cannot be used as a token in programming languages. Instead the valid token "DCU" is used to tag the register names and function names. The Display Controller Unit (DCU) module is a system master that fetches graphics stored in internal or external memory and displays them on a TFT LCD panel. A wide range of panel sizes is supported and the timing of the interface signals is highly configurable. Graphics are read directly from memory and then blended in real-time, which allows for dynamic content creation with minimal CPU intervention. The features: (1) Full RGB888 output to TFT LCD panel. (2) For the current LCD panel, WQVGA "480x272" is supported. (3) Blending of each pixel using up to 4 source layers dependent on size of panel. (4) Each graphic layer can be placed with one pixel resolution in either axis. (5) Each graphic layer support RGB565 and RGB888 direct colors without alpha channel and BGRA8888 direct colors with an alpha channel. (6) Each graphic layer support alpha blending with 8-bit resolution. This is a simplified version, only one primary plane, one framebuffer created for fbdev, one crtc, one connector for TFT LCD panel, an encoder. Signed-off-by: Alison Wang Signed-off-by: Xiubo Li Signed-off-by: Jianwei Wang --- Changed in V3: - Test driver on Vybrid board and add compatible string - Remove unused functions - set default crtc for encoder - replace legacy functions with atomic help functions - Set the unique name of the DRM device - Implement irq handle function for vblank interrupt Changed in v2:  - Add atomic support - Modify bindings file - Rename node for compatibility - Move platform related code out for compatibility .../devicetree/bindings/drm/fsl/fsl,dcu.txt | 50 ++++ drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/fsl/Kconfig | 17 ++ drivers/gpu/drm/fsl/Makefile | 8 + drivers/gpu/drm/fsl/fsl_dcu_drm_connector.c | 193 ++++++++++++ drivers/gpu/drm/fsl/fsl_dcu_drm_connector.h | 30 ++ drivers/gpu/drm/fsl/fsl_dcu_drm_crtc.c | 165 ++++++++++ drivers/gpu/drm/fsl/fsl_dcu_drm_crtc.h | 26 ++ drivers/gpu/drm/fsl/fsl_dcu_drm_drv.c | 331 +++++++++++++++++++++ drivers/gpu/drm/fsl/fsl_dcu_drm_drv.h | 210 +++++++++++++ drivers/gpu/drm/fsl/fsl_dcu_drm_fbdev.c | 26 ++ drivers/gpu/drm/fsl/fsl_dcu_drm_kms.c | 42 +++ drivers/gpu/drm/fsl/fsl_dcu_drm_kms.h | 17 ++ drivers/gpu/drm/fsl/fsl_dcu_drm_plane.c | 192 ++++++++++++ drivers/gpu/drm/fsl/fsl_dcu_drm_plane.h | 23 ++ 16 files changed, 1333 insertions(+) create mode 100644 Documentation/devicetree/bindings/drm/fsl/fsl,dcu.txt create mode 100644 drivers/gpu/drm/fsl/Kconfig create mode 100644 drivers/gpu/drm/fsl/Makefile create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_connector.c create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_connector.h create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_crtc.c create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_crtc.h create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_drv.c create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_drv.h create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_fbdev.c create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_kms.c create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_kms.h create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_plane.c create mode 100644 drivers/gpu/drm/fsl/fsl_dcu_drm_plane.h diff --git a/Documentation/devicetree/bindings/drm/fsl/fsl,dcu.txt b/Documentation/devicetree/bindings/drm/fsl/fsl,dcu.txt new file mode 100644 index 0000000..bdc7d5b --- /dev/null +++ b/Documentation/devicetree/bindings/drm/fsl/fsl,dcu.txt @@ -0,0 +1,50 @@ +Device Tree bindings for Freescale DCU DRM Driver + +Required properties: +- compatible: Should be one of + * "fsl,ls1021a-dcu". + * "fsl,vf610-dcu". +- reg: Address and length of the register set for dcu. +- clocks: From common clock binding: handle to dcu clock. +- clock-names: From common clock binding: Shall be "dcu". +- display: The phandle to display node. + +Required properties: +- bits-per-pixel: <16> for RGB565, + <24> for RGB888, + <32> for RGB8888. + +Required timing node for dispplay sub-node: +- display-timings: Refer to binding doc display-timing.txt for details. + +Examples: +dcu: dcu@2ce0000 { + compatible = "fsl,ls1021a-dcu"; + reg = <0x0 0x2ce0000 0x0 0x10000>; + clocks = <&platform_clk 0>; + clock-names = "dcu"; + big-endian; + display = <&display>; + + display: display@0 { + bits-per-pixel = <24>; + + display-timings { + native-mode = <&timing0>; + timing0: nl4827hc19 { + clock-frequency = <10870000>; + hactive = <480>; + vactive = <272>; + hback-porch = <2>; + hfront-porch = <2>; + vback-porch = <1>; + vfront-porch = <1>; + hsync-len = <41>; + vsync-len = <2>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; +}; + diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 151a050..a6957aa 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -199,6 +199,8 @@ source "drivers/gpu/drm/bochs/Kconfig" source "drivers/gpu/drm/msm/Kconfig" +source "drivers/gpu/drm/fsl/Kconfig" + source "drivers/gpu/drm/tegra/Kconfig" source "drivers/gpu/drm/panel/Kconfig" diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 2c239b9..ab5b9ef 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_DRM_UDL) += udl/ obj-$(CONFIG_DRM_AST) += ast/ obj-$(CONFIG_DRM_ARMADA) += armada/ obj-$(CONFIG_DRM_ATMEL_HLCDC) += atmel-hlcdc/ +obj-$(CONFIG_DRM_FSL_DCU) += fsl/ obj-$(CONFIG_DRM_RCAR_DU) += rcar-du/ obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/ obj-$(CONFIG_DRM_OMAP) += omapdrm/ diff --git a/drivers/gpu/drm/fsl/Kconfig b/drivers/gpu/drm/fsl/Kconfig new file mode 100644 index 0000000..e4f8df0 --- /dev/null +++ b/drivers/gpu/drm/fsl/Kconfig @@ -0,0 +1,17 @@ +config DRM_FSL_DCU + tristate "DRM Support for Freescale DCU" + depends on DRM && OF && ARM + select DRM_KMS_HELPER + select DRM_KMS_CMA_HELPER + select VIDEOMODE_HELPERS + select BACKLIGHT_CLASS_DEVICE + select BACKLIGHT_LCD_SUPPORT + select REGMAP_MMIO + select DRM_KMS_FB_HELPER + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select FB_SYS_FOPS + help + Choose this option if you have an Freescale DCU chipset. + If M is selected the module will be called fsl-dcu-drm. diff --git a/drivers/gpu/drm/fsl/Makefile b/drivers/gpu/drm/fsl/Makefile new file mode 100644 index 0000000..5f74aee --- /dev/null +++ b/drivers/gpu/drm/fsl/Makefile @@ -0,0 +1,8 @@ +fsl-dcu-drm-y := fsl_dcu_drm_drv.o \ + fsl_dcu_drm_kms.o \ + fsl_dcu_drm_connector.o \ + fsl_dcu_drm_plane.o \ + fsl_dcu_drm_crtc.o \ + fsl_dcu_drm_fbdev.o \ + +obj-$(CONFIG_DRM_FSL_DCU) += fsl-dcu-drm.o diff --git a/drivers/gpu/drm/fsl/fsl_dcu_drm_connector.c b/drivers/gpu/drm/fsl/fsl_dcu_drm_connector.c new file mode 100644 index 0000000..4610647 --- /dev/null +++ b/drivers/gpu/drm/fsl/fsl_dcu_drm_connector.c @@ -0,0 +1,193 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * Freescale DCU drm device driver + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include + +#include +#include +#include