From patchwork Wed Mar 25 20:25:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 454771 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id A21E5140119 for ; Thu, 26 Mar 2015 07:25:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753369AbbCYUZ5 (ORCPT ); Wed, 25 Mar 2015 16:25:57 -0400 Received: from mail-pd0-f172.google.com ([209.85.192.172]:33477 "EHLO mail-pd0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753361AbbCYUZ4 (ORCPT ); Wed, 25 Mar 2015 16:25:56 -0400 Received: by pdnc3 with SMTP id c3so39478799pdn.0 for ; Wed, 25 Mar 2015 13:25:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+bejMVQHIMZt9ryk7WaLSZlbkuX4q6wtJRXSPBbGOrk=; b=LNR7EiZKVEVd9kbneJDGGKPDVq7R2SKOis9kbwXeRz09Rbg/r8mvpiWVxp25LOImt8 6agKtdmJQZxkv5pgIXM7+5j37TOGBuhlBV72BMteHMTaadjSu6os7hzYVl3cCqVbnSiQ JnVdp2v1rI3ZQJDBnCj97uVXC6Pek5VWWbzjwpe7nGX4jCHNvGqg3gMtZaNPt7G/KHLl o0VruAv7gK/+tydu4oHTf7rj/D9vGzSKRwMPtwBsGhCEvPrDi+Q0Y085PbiKdaAcuu0t 608ji/D3+yynZq/wZxOG/WzHWcKMAaZeTBxaf5I+x3kh0xrSjLFV1KHrITW1nQSo0pBN E0vA== X-Gm-Message-State: ALoCoQm8zIPJXsyc+a4rdGrABAiKL84cI/n3u3/0OKSh/n4T2HFppWUnNVhICiVBy80tZTWOgIwR X-Received: by 10.70.35.101 with SMTP id g5mr19982649pdj.75.1427315155756; Wed, 25 Mar 2015 13:25:55 -0700 (PDT) Received: from ubuntu.localdomain (i-global254.qualcomm.com. [199.106.103.254]) by mx.google.com with ESMTPSA id nq8sm3333819pdb.37.2015.03.25.13.25.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 25 Mar 2015 13:25:54 -0700 (PDT) From: Lina Iyer To: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, galak@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: lorenzo.pieralisi@arm.com, msivasub@codeaurora.org, devicetree@vger.kernel.org, agross@codeaurora.org, Lina Iyer Subject: [PATCH v18 02/11] devicetree: bindings: Update qcom, saw2 node bindings Date: Wed, 25 Mar 2015 14:25:27 -0600 Message-Id: <1427315136-44321-3-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1427315136-44321-1-git-send-email-lina.iyer@linaro.org> References: <1427315136-44321-1-git-send-email-lina.iyer@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update qcom,saw2 node bindings with compatible strings to identify nodes that provides cpuidle functionality for a particular SoC. Remove unused compatible strings. Update examples for different SAW nodes. Signed-off-by: Lina Iyer --- .../devicetree/bindings/arm/msm/qcom,saw2.txt | 40 +++++++++++++++++----- 1 file changed, 31 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt index 1505fb8..ae4afc6 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt +++ b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt @@ -2,22 +2,31 @@ SPM AVS Wrapper 2 (SAW2) The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable -micro-controller that transitions a piece of hardware (like a processor or +power-controller that transitions a piece of hardware (like a processor or subsystem) into and out of low power modes via a direct connection to the PMIC. It can also be wired up to interact with other processors in the system, notifying them when a low power state is entered or exited. +Multiple revisions of the SAW hardware are supported using these Device Nodes. +SAW2 revisions differ in the register offset and configuration data. Also, the +same revision of the SAW in different SoCs may have different configuration +data due the the differences in hardware capabilities. Hence the SoC name, the +version of the SAW hardware in that SoC and the distinction between cpu (big +or Little) or cache, may be needed to uniquely identify the SAW register +configuration and initialization data. The compatible string is used to +indicate this parameter. + PROPERTIES - compatible: Usage: required Value type: - Definition: shall contain "qcom,saw2". A more specific value should be - one of: - "qcom,saw2-v1" - "qcom,saw2-v1.1" - "qcom,saw2-v2" - "qcom,saw2-v2.1" + Definition: Must have + "qcom,saw2" + A more specific value could be one of: + "qcom,apq8064-saw2-v1.1-cpu" + "qcom,msm8974-saw2-v2.1-cpu" + "qcom,apq8084-saw2-v2.1-cpu" - reg: Usage: required @@ -26,10 +35,23 @@ PROPERTIES the register region. An optional second element specifies the base address and size of the alias register region. +- regulator: + Usage: optional + Value type: boolean + Definition: Indicates that this SPM device acts as a regulator device + device for the core (CPU or Cache) the SPM is attached + to. -Example: +Example 1: - regulator@2099000 { + power-controller@2099000 { compatible = "qcom,saw2"; reg = <0x02099000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + +Example 2: + saw0: power-controller@f9089000 { + compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2"; + reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>; };