From patchwork Wed Mar 11 02:27:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 448770 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 87EF014008F for ; Wed, 11 Mar 2015 14:13:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752036AbbCKDNa (ORCPT ); Tue, 10 Mar 2015 23:13:30 -0400 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:50926 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751807AbbCKDN1 (ORCPT ); Tue, 10 Mar 2015 23:13:27 -0400 Received: from SHSQR01.spreadtrum.com (localhost [127.0.0.2] (may be forged)) by SHSQR01.spreadtrum.com with ESMTP id t2B2UjE9075306; Wed, 11 Mar 2015 10:30:45 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from sci-ig2.spreadtrum.com (shcas02.spreadtrum.com [10.0.1.202]) by SHSQR01.spreadtrum.com with ESMTP id t2B2RA5r035870 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=NO); Wed, 11 Mar 2015 10:27:10 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from SHMBX02.spreadtrum.com (10.0.1.204) by SHMBX01.spreadtrum.com (10.0.1.203) with Microsoft SMTP Server (TLS) id 15.0.847.32; Wed, 11 Mar 2015 10:27:10 +0800 Received: from SHMBX02.spreadtrum.com ([fe80::a975:5f52:6ec4:4585]) by SHMBX02.spreadtrum.com ([fe80::a975:5f52:6ec4:4585%20]) with mapi id 15.00.0847.030; Wed, 11 Mar 2015 10:27:09 +0800 From: =?gb2312?B?Q2h1bnlhbiBaaGFuZyAo1cW0utHeKQ==?= To: "arm@kernel.org" CC: "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "zhang.lyra@gmail.com" Subject: [PATCH v8 1/2] arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile Thread-Topic: [PATCH v8 1/2] arm64: dts: Add support for Spreadtrum SC9836 SoC in dts and Makefile Thread-Index: AQHQW6LfPPs3GuWs+Uy0QR/22qpzlg== Date: Wed, 11 Mar 2015 02:27:08 +0000 Message-ID: <1426040790-19495-2-git-send-email-chunyan.zhang@spreadtrum.com> References: <1426040790-19495-1-git-send-email-chunyan.zhang@spreadtrum.com> In-Reply-To: <1426040790-19495-1-git-send-email-chunyan.zhang@spreadtrum.com> Accept-Language: en-US, zh-CN, en-HK Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.0.67.143] MIME-Version: 1.0 X-MAIL: SHSQR01.spreadtrum.com t2B2RA5r035870 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Zhizhou Zhang Adds the device tree support for Spreadtrum SC9836 SoC which is based on Sharkl64 platform. Sharkl64 platform contains the common nodes of Spreadtrum's arm64-based SoCs. Signed-off-by: Zhizhou Zhang Signed-off-by: Orson Zhai Signed-off-by: Chunyan Zhang Acked-by: Mark Rutland --- arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/sprd/Makefile | 5 ++ arch/arm64/boot/dts/sprd/sc9836-openphone.dts | 49 ++++++++++++++++++ arch/arm64/boot/dts/sprd/sc9836.dtsi | 74 +++++++++++++++++++++++++++ arch/arm64/boot/dts/sprd/sharkl64.dtsi | 65 +++++++++++++++++++++++ 5 files changed, 194 insertions(+) create mode 100644 arch/arm64/boot/dts/sprd/Makefile create mode 100644 arch/arm64/boot/dts/sprd/sc9836-openphone.dts create mode 100644 arch/arm64/boot/dts/sprd/sc9836.dtsi create mode 100644 arch/arm64/boot/dts/sprd/sharkl64.dtsi -- 1.9.1 diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index e0350ca..930f7f8 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -5,5 +5,6 @@ dts-dirs += cavium dts-dirs += exynos dts-dirs += freescale dts-dirs += mediatek +dts-dirs += sprd subdir-y := $(dts-dirs) diff --git a/arch/arm64/boot/dts/sprd/Makefile b/arch/arm64/boot/dts/sprd/Makefile new file mode 100644 index 0000000..b658c5e --- /dev/null +++ b/arch/arm64/boot/dts/sprd/Makefile @@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_SPRD) += sc9836-openphone.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/sprd/sc9836-openphone.dts b/arch/arm64/boot/dts/sprd/sc9836-openphone.dts new file mode 100644 index 0000000..e5657c3 --- /dev/null +++ b/arch/arm64/boot/dts/sprd/sc9836-openphone.dts @@ -0,0 +1,49 @@ +/* + * Spreadtrum SC9836 openphone board DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/dts-v1/; + +#include "sc9836.dtsi" + +/ { + model = "Spreadtrum SC9836 Openphone Board"; + + compatible = "sprd,sc9836-openphone", "sprd,sc9836"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0x20000000>; + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi new file mode 100644 index 0000000..f92f1b4 --- /dev/null +++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi @@ -0,0 +1,74 @@ +/* + * Spreadtrum SC9836 SoC DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +#include "sharkl64.dtsi" +#include + +/ { + compatible = "sprd,sc9836"; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + gic: interrupt-controller@12001000 { + compatible = "arm,gic-400"; + reg = <0 0x12001000 0 0x1000>, + <0 0x12002000 0 0x2000>, + <0 0x12004000 0 0x2000>, + <0 0x12006000 0 0x2000>; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + }; + + psci { + compatible = "arm,psci"; + method = "smc"; + cpu_on = <0xc4000003>; + cpu_off = <0x84000002>; + cpu_suspend = <0xc4000001>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; +}; diff --git a/arch/arm64/boot/dts/sprd/sharkl64.dtsi b/arch/arm64/boot/dts/sprd/sharkl64.dtsi new file mode 100644 index 0000000..6b4bdc5 --- /dev/null +++ b/arch/arm64/boot/dts/sprd/sharkl64.dtsi @@ -0,0 +1,65 @@ +/* + * Spreadtrum Sharkl64 platform DTS file + * + * Copyright (C) 2014, Spreadtrum Communications Inc. + * + * This file is licensed under a dual GPLv2 or X11 license. + */ + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ap-apb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart0: serial@70000000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70000000 0 0x100>; + interrupts = <0 2 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart1: serial@70100000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70100000 0 0x100>; + interrupts = <0 3 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart2: serial@70200000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70200000 0 0x100>; + interrupts = <0 4 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + + uart3: serial@70300000 { + compatible = "sprd,sc9836-uart"; + reg = <0 0x70300000 0 0x100>; + interrupts = <0 5 0xf04>; + clocks = <&clk26mhz>; + status = "disabled"; + }; + }; + }; + + clk26mhz: clk26mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; +};