From patchwork Thu Jan 22 09:48:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 431745 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id A5749140284 for ; Thu, 22 Jan 2015 20:49:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751322AbbAVJtj (ORCPT ); Thu, 22 Jan 2015 04:49:39 -0500 Received: from mail-ie0-f182.google.com ([209.85.223.182]:53486 "EHLO mail-ie0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752342AbbAVJtK (ORCPT ); Thu, 22 Jan 2015 04:49:10 -0500 Received: by mail-ie0-f182.google.com with SMTP id ar1so460824iec.13 for ; Thu, 22 Jan 2015 01:49:09 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OPQWKesJGtw6d919WIALNzPW4M8JDAMZvj7cD/uKRk4=; b=CrRmT/bCWR6HE7NnGmmX7HjW2sbK9cxsrxjLFG7V7GsFtSl4lIhwsUMyDKcAn4sb9P HTEQ3ViDMKFQ8m7AT4sv1Zz6PS2I9x4OCZqB6HY/jgN0KYdpy5yDwP52KkEZZwIAHgs/ 6S6wf+0dDjT3oVmQJNdbP7aa3rirQau6rA625goD5pXUCh7fbOIAnbeYuBEmWOMGKIyT ko9B/CVpxwcrDgSiFO/vYSA96SacdoT8RBz3cnVukF5NVKbOuUDRD9ySrUOQ8JoBMK/k 71E8azmPwSookG0meTOHO/l7AT8Vr48L5f4Wd1X1gY3U18RXG6/2SWQs/wAGhyQAclWu 1LqA== X-Gm-Message-State: ALoCoQkSQzCeqVILgQhixELwbCz8QOlSp/qsW+X/k0V6XplMTFti0f8zxMyfAhvXPIYfae1kb8RW X-Received: by 10.42.229.132 with SMTP id ji4mr1722153icb.86.1421920149120; Thu, 22 Jan 2015 01:49:09 -0800 (PST) Received: from localhost.localdomain (host109-148-235-13.range109-148.btcentralplus.com. [109.148.235.13]) by mx.google.com with ESMTPSA id c4sm2144027igt.19.2015.01.22.01.49.06 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Jan 2015 01:49:08 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, tglx@linutronix.de, jason@lakedaemon.net, devicetree@vger.kernel.org Subject: [PATCH v2 RESEND 3/8] irqchip: irq-st: Add documentation for STi based syscfg IRQs Date: Thu, 22 Jan 2015 09:48:48 +0000 Message-Id: <1421920133-7914-4-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1421920133-7914-1-git-send-email-lee.jones@linaro.org> References: <1421920133-7914-1-git-send-email-lee.jones@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Lee Jones --- .../interrupt-controller/st,sti-irq-syscfg.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt new file mode 100644 index 0000000..ced6014 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt @@ -0,0 +1,35 @@ +STMicroelectronics STi System Configuration Controlled IRQs +----------------------------------------------------------- + +On STi based systems; External, CTI (Core Sight), PMU (Performance Management), +and PL310 L2 Cache IRQs are controlled using System Configuration registers. +This driver is used to unmask them prior to use. + +Required properties: +- compatible : Should be set to one of: + "st,stih415-irq-syscfg" + "st,stih416-irq-syscfg" + "st,stih407-irq-syscfg" + "st,stid127-irq-syscfg" +- st,syscfg : Phandle to Cortex-A9 IRQ system config registers +- st,irq-device : Array of IRQs to enable - should be 2 in length +- st,fiq-device : Array of FIQs to enable - should be 2 in length + +Optional properties: +- st,invert-ext : External IRQs can be inverted at will. This property inverts + these IRQs using bitwise logic. A number of defines have been + provided for convenience: + ST_IRQ_SYSCFG_EXT_1_INV + ST_IRQ_SYSCFG_EXT_2_INV + ST_IRQ_SYSCFG_EXT_3_INV +Example: + +irq-syscfg { + compatible = "st,stih416-irq-syscfg"; + st,syscfg = <&syscfg_cpu>; + st,irq-device = , + ; + st,fiq-device = , + ; + st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>; +};