From patchwork Wed Dec 10 14:37:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yingjoe Chen X-Patchwork-Id: 419686 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D858514009B for ; Thu, 11 Dec 2014 01:37:20 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757561AbaLJOhS (ORCPT ); Wed, 10 Dec 2014 09:37:18 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:51745 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1755993AbaLJOhQ (ORCPT ); Wed, 10 Dec 2014 09:37:16 -0500 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1927666343; Wed, 10 Dec 2014 22:37:14 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Wed, 10 Dec 2014 22:37:13 +0800 Subject: Re: [PATCH 2/4] irqchip: mediatek: Add support for mt8173 From: Yingjoe Chen To: Arnd Bergmann CC: , Eddie Huang , Matthias Brugger , Rob Herring , Jason Cooper , Mark Rutland , , , Pawel Moll , Ian Campbell , Catalin Marinas , Mark Brown , Will Deacon , , Robert Richter , Sascha Hauer , Kumar Gala , Olof Johansson , Thomas Gleixner , In-Reply-To: <2545975.QDuBFbG7BN@wuerfel> References: <1418208602-35584-1-git-send-email-eddie.huang@mediatek.com> <1418208602-35584-3-git-send-email-eddie.huang@mediatek.com> <2545975.QDuBFbG7BN@wuerfel> Date: Wed, 10 Dec 2014 22:37:13 +0800 Message-ID: <1418222233.21309.17.camel@mtksdaap41> MIME-Version: 1.0 X-Mailer: Evolution 2.28.3 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Arnd, On Wed, 2014-12-10 at 12:00 +0100, Arnd Bergmann wrote: > On Wednesday 10 December 2014 18:50:00 Eddie Huang wrote: > > From: Yingjoe Chen > > > > MT8173 intpol have 32 more irq pins, add support to it. > > > > Signed-off-by: Yingjoe Chen > > Signed-off-by: Eddie Huang > > > > How about adding a property for the number of irq pins and leave the > old compatible string in place? I don't think it would be good if > we have to update this driver for each new SoC that uses this > irqchip just to change one number. > > Arnd OK, I'll change to something like this in next version: Joe.C --- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt @@ -17,12 +17,17 @@ Required properties: use the same interrupt-cells format as GIC. - reg: Physical base address of the intpol registers and length of memory mapped region. +Optional properties: +- mediatek,intpol-number: The number of interrupts supported by intpol, + default 224 if omitted. + Example: sysirq: interrupt-controller@10200100 { compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq"; interrupt-controller; #interrupt-cells = <3>; interrupt-parent = <&gic>; reg = <0 0x10200100 0 0x1c>; + mediatek,intpol-number = <224>; };