From patchwork Tue Nov 25 16:25:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 414765 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 89BBF1400EA for ; Wed, 26 Nov 2014 03:27:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751072AbaKYQZa (ORCPT ); Tue, 25 Nov 2014 11:25:30 -0500 Received: from mail-ig0-f178.google.com ([209.85.213.178]:63568 "EHLO mail-ig0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751100AbaKYQZ3 (ORCPT ); Tue, 25 Nov 2014 11:25:29 -0500 Received: by mail-ig0-f178.google.com with SMTP id hl2so972111igb.17 for ; Tue, 25 Nov 2014 08:25:28 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XPQp2QJ1y4iEqLkvSEoSqtuZsSsKRdqCsXCxfdBGhxo=; b=fI0RwDpxQcxQZvXmnUpi1Cwtb03y5fEMYB1lwabrkyzfIDWvLPPecmIyYrRshBAKDD 29T928phi1arjXfXrzQrNdzSLTswesz/2o9hdGBBJzvXFxRYGnTnqA7W3TaW+3ACTSqD hXHjN1XTImcWCRiOQnwzWJbMSAGg/6oj5ccEqafdm0oX3XyTfwjaSzPRiJSygSjke+uz BKfpYgjHzFy0AF+JnVwwthUuboN7GzmF308Y1rgCq4utcT/qNMYV5JKXlrCGXBPSvd+D YIDBcYLD7MvACmNIoPvnRrsRYavIP1HduZNkkT98lqOgXL7HgKZ9k2Pi2BbaP2+6wj3n HEtA== X-Gm-Message-State: ALoCoQlfuf539OxBNXKkIpwoIlisT99xnBc3zVtYBB1fuwW3YOO8bt0mFEfg1PJfXVypf8ceFelK X-Received: by 10.107.152.135 with SMTP id a129mr24897734ioe.39.1416932728623; Tue, 25 Nov 2014 08:25:28 -0800 (PST) Received: from localhost.localdomain (host109-148-232-11.range109-148.btcentralplus.com. [109.148.232.11]) by mx.google.com with ESMTPSA id b123sm790112iob.4.2014.11.25.08.25.26 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Nov 2014 08:25:28 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, tglx@linutronix.de, jason@lakedaemon.net, devicetree@vger.kernel.org Subject: [PATCH v2 3/8] irqchip: irq-st: Add documentation for STi based syscfg IRQs Date: Tue, 25 Nov 2014 16:25:00 +0000 Message-Id: <1416932705-16880-4-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1416932705-16880-1-git-send-email-lee.jones@linaro.org> References: <1416932705-16880-1-git-send-email-lee.jones@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Lee Jones --- .../interrupt-controller/st,sti-irq-syscfg.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt new file mode 100644 index 0000000..ced6014 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt @@ -0,0 +1,35 @@ +STMicroelectronics STi System Configuration Controlled IRQs +----------------------------------------------------------- + +On STi based systems; External, CTI (Core Sight), PMU (Performance Management), +and PL310 L2 Cache IRQs are controlled using System Configuration registers. +This driver is used to unmask them prior to use. + +Required properties: +- compatible : Should be set to one of: + "st,stih415-irq-syscfg" + "st,stih416-irq-syscfg" + "st,stih407-irq-syscfg" + "st,stid127-irq-syscfg" +- st,syscfg : Phandle to Cortex-A9 IRQ system config registers +- st,irq-device : Array of IRQs to enable - should be 2 in length +- st,fiq-device : Array of FIQs to enable - should be 2 in length + +Optional properties: +- st,invert-ext : External IRQs can be inverted at will. This property inverts + these IRQs using bitwise logic. A number of defines have been + provided for convenience: + ST_IRQ_SYSCFG_EXT_1_INV + ST_IRQ_SYSCFG_EXT_2_INV + ST_IRQ_SYSCFG_EXT_3_INV +Example: + +irq-syscfg { + compatible = "st,stih416-irq-syscfg"; + st,syscfg = <&syscfg_cpu>; + st,irq-device = , + ; + st,fiq-device = , + ; + st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>; +};