From patchwork Mon Nov 17 13:35:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antoine Tenart X-Patchwork-Id: 411681 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 59F9B14012B for ; Tue, 18 Nov 2014 00:35:57 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752512AbaKQNfz (ORCPT ); Mon, 17 Nov 2014 08:35:55 -0500 Received: from down.free-electrons.com ([37.187.137.238]:48648 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752152AbaKQNfx (ORCPT ); Mon, 17 Nov 2014 08:35:53 -0500 Received: by mail.free-electrons.com (Postfix, from userid 106) id A1DA573D; Mon, 17 Nov 2014 14:35:57 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from kwain.n0.pe (uks.foo.tf [5.39.78.56]) by mail.free-electrons.com (Postfix) with ESMTPSA id BF7B0742; Mon, 17 Nov 2014 14:35:56 +0100 (CET) From: Antoine Tenart To: sebastian.hesselbarth@gmail.com, Peter.Chen@freescale.com, balbi@ti.com, p.zabel@pengutronix.de Cc: Antoine Tenart , alexandre.belloni@free-electrons.com, thomas.petazzoni@free-electrons.com, zmxu@marvell.com, jszhang@marvell.com, michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 02/13] Documentation: bindings: add reset bindings docs for Marvell Berlin SoCs Date: Mon, 17 Nov 2014 14:35:36 +0100 Message-Id: <1416231347-27193-3-git-send-email-antoine.tenart@free-electrons.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1416231347-27193-1-git-send-email-antoine.tenart@free-electrons.com> References: <1416231347-27193-1-git-send-email-antoine.tenart@free-electrons.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the reset binding documentation to the SoC binding documentation as the reset driver in Marvell Berlin SoC is part of the chip/system control registers. This patch adds the required properties to configure the reset controller. Signed-off-by: Antoine Tenart Acked-by: Philipp Zabel --- Documentation/devicetree/bindings/arm/marvell,berlin.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt index 904de5781f44..a99eb9eb14c0 100644 --- a/Documentation/devicetree/bindings/arm/marvell,berlin.txt +++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt @@ -106,11 +106,21 @@ Required subnode-properties: - groups: a list of strings describing the group names. - function: a string describing the function used to mux the groups. +* Reset controller binding + +A reset controller is part of the chip control registers set. The chip control +node also provides the reset. The register set is not at the same offset between +Berlin SoCs. + +Required property: +- #reset-cells: must be set to 2 + Example: chip: chip-control@ea0000 { compatible = "marvell,berlin2-chip-ctrl"; #clock-cells = <1>; + #reset-cells = <2>; reg = <0xea0000 0x400>; clocks = <&refclk>, <&externaldev 0>; clock-names = "refclk", "video_ext0";