From patchwork Tue Oct 21 09:13:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "jinkun.hong" X-Patchwork-Id: 401388 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 5C09914007F for ; Tue, 21 Oct 2014 20:16:28 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753978AbaJUJOd (ORCPT ); Tue, 21 Oct 2014 05:14:33 -0400 Received: from mail-pd0-f193.google.com ([209.85.192.193]:57733 "EHLO mail-pd0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751038AbaJUJOb (ORCPT ); Tue, 21 Oct 2014 05:14:31 -0400 Received: by mail-pd0-f193.google.com with SMTP id v10so256664pde.0 for ; Tue, 21 Oct 2014 02:14:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5SGPHWLIr3NEImgqd2b2veNleqmLkKG6d2ON4kpFc/E=; b=i1OvpEWY/LDUJcO4oMn7qUtIXHBQ9tjzJCLWqpHJlz3sI623Mj2jCB7j4Rbj0UNLV3 EfmN6/QkwW1TrC591qeoMPR5F0gyksdKOHRzYOk5Z+foZsWWCXA9mtrsZEBqhx4Me9FN +dSJXbZKErw/U7x8cOjAYajbxF503SrCc0nJfrRN9U0tYHtOUFwMCcioCLgGGl79z1eD epO9ioxQnWt0/3DrSgIyoJbo6SkLp8p5znAA+PaqBTYrVuBrAlPsJ16ALI5oqD543R5U Pe8HsYkqffdAmXMA8/y/4Q56E5znB6qi4F+oM9HtkllOZ7v5BtTbzzn0Y305JGHZKA4h gesQ== X-Received: by 10.70.38.201 with SMTP id i9mr9500146pdk.127.1413882870848; Tue, 21 Oct 2014 02:14:30 -0700 (PDT) Received: from localhost.localdomain ([58.22.7.114]) by mx.google.com with ESMTPSA id b3sm11328983pdm.65.2014.10.21.02.14.22 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 21 Oct 2014 02:14:30 -0700 (PDT) From: "jinkun.hong" To: linus.walleij@linaro.org, linux-arm-kernel@lists.infradead.org Cc: Russell King , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Grant Likely , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Randy Dunlap , linux-doc@vger.kernel.org, dianders@chromium.org, Heiko Stuebner , linux-rockchip@lists.infradead.org, Ulf Hansson , "jinkun.hong" , Jack Dai Subject: [PATCH v5 2/3] dt-bindings: add document of Rockchip power domain Date: Tue, 21 Oct 2014 02:13:27 -0700 Message-Id: <1413882808-4669-3-git-send-email-jinkun.hong@rock-chips.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1413882808-4669-1-git-send-email-jinkun.hong@rock-chips.com> References: <1413882808-4669-1-git-send-email-jinkun.hong@rock-chips.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: "jinkun.hong" Signed-off-by: Jack Dai Signed-off-by: jinkun.hong --- Changes in v5: None Changes in v4: None Changes in v3: - DT structure has changed Changes in v2: - move clocks to "optional" .../bindings/arm/rockchip/power_domain.txt | 46 ++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rockchip/power_domain.txt diff --git a/Documentation/devicetree/bindings/arm/rockchip/power_domain.txt b/Documentation/devicetree/bindings/arm/rockchip/power_domain.txt new file mode 100644 index 0000000..f8357b3 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/rockchip/power_domain.txt @@ -0,0 +1,46 @@ +* Rockchip Power Domains + +Rockchip processors include support for multiple power domains which can be +powered up/down by software based on different application scenes to save power. + +Required properties for power domain controller: +- compatible: should be one of the following. + * rockchip,rk3288-power-gpu - for rk3288 type gpu power domain. + * rockchip,rk3288-power-hevc - for rk3288 type hevc power domain. + * rockchip,rk3288-power-video - for rk3288 type video power domain. + * rockchip,rk3288-power-vio - for rk3288 type vio power domain. +- rockchip,pmu: phandle referencing a syscon providing the pmu registers +- #power-domain-cells: Number of cells in a power-domain specifier. + should be 0. + +Example: + + gpu_power: gpu-power-controller { + compatible = "rockchip,rk3288-power-gpu"; + rockchip,pmu = <&pmu>; + #power-domain-cells = <0>; + }; + + hevc_power: hevc-power-controller { + compatible = "rockchip,rk3288-power-hevc"; + rockchip,pmu = <&pmu>; + #power-domain-cells = <0>; + }; + + video_power: video-power-controller { + compatible = "rockchip,rk3288-power-video"; + rockchip,pmu = <&pmu>; + #power-domain-cells = <0>; + }; + + vio_power: vio-power-controller { + compatible = "rockchip,rk3288-power-vio"; + rockchip,pmu = <&pmu>; + #power-domain-cells = <0>; + }; + + gpu: gpu@0xffa30000 { + ... + power-domains = <&gpu_power>; + ... + };