From patchwork Fri Oct 17 09:54:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 400504 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id AAFF01400A0 for ; Fri, 17 Oct 2014 21:41:47 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751526AbaJQKlr (ORCPT ); Fri, 17 Oct 2014 06:41:47 -0400 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:31059 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751293AbaJQKlq (ORCPT ); Fri, 17 Oct 2014 06:41:46 -0400 Received: from SHSQR01.spreadtrum.com (localhost [127.0.0.2] (may be forged)) by SHSQR01.spreadtrum.com with ESMTP id s9HA4ks8019029 for ; Fri, 17 Oct 2014 18:04:46 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from sci-ig2.spreadtrum.com (shcas01.spreadtrum.com [10.0.1.201]) by SHSQR01.spreadtrum.com with ESMTP id s9H9t3hf008465; Fri, 17 Oct 2014 17:55:03 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from chunyanzhangubtpc.local.spreadtrum.com (10.0.67.117) by SHMBX01.spreadtrum.com (10.0.1.203) with Microsoft SMTP Server (TLS) id 15.0.847.32; Fri, 17 Oct 2014 17:55:02 +0800 From: Chunyan Zhang To: , , , , , , , , , , , , , , , CC: , , , Subject: [PATCH v2 1/5] Documentation: DT: Renamed of-serial.txt to 8250.txt Date: Fri, 17 Oct 2014 17:54:21 +0800 Message-ID: <1413539665-11484-2-git-send-email-chunyan.zhang@spreadtrum.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1413539665-11484-1-git-send-email-chunyan.zhang@spreadtrum.com> References: <1413539665-11484-1-git-send-email-chunyan.zhang@spreadtrum.com> MIME-Version: 1.0 X-Originating-IP: [10.0.67.117] X-ClientProxiedBy: SHCAS02.spreadtrum.com (10.0.1.202) To SHMBX01.spreadtrum.com (10.0.1.203) X-MAIL: SHSQR01.spreadtrum.com s9H9t3hf008465 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The file of-serial.txt was only for 8250 compatible UART implementations, so renamed it to 8250.txt to avoid confusing other persons. Signed-off-by: Chunyan Zhang Acked-by: Mark Rutland --- Documentation/devicetree/bindings/serial/8250.txt | 50 ++++++++++++++++++++ .../devicetree/bindings/serial/of-serial.txt | 50 -------------------- 2 files changed, 50 insertions(+), 50 deletions(-) create mode 100644 Documentation/devicetree/bindings/serial/8250.txt delete mode 100644 Documentation/devicetree/bindings/serial/of-serial.txt diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt new file mode 100644 index 0000000..7705477 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/8250.txt @@ -0,0 +1,50 @@ +* UART (Universal Asynchronous Receiver/Transmitter) + +Required properties: +- compatible : one of: + - "ns8250" + - "ns16450" + - "ns16550a" + - "ns16550" + - "ns16750" + - "ns16850" + - "nvidia,tegra20-uart" + - "nxp,lpc3220-uart" + - "ibm,qpace-nwp-serial" + - "altr,16550-FIFO32" + - "altr,16550-FIFO64" + - "altr,16550-FIFO128" + - "serial" if the port type is unknown. +- reg : offset and length of the register set for the device. +- interrupts : should contain uart interrupt. +- clock-frequency : the input clock frequency for the UART + or + clocks phandle to refer to the clk used as per Documentation/devicetree + /bindings/clock/clock-bindings.txt + +Optional properties: +- current-speed : the current active speed of the UART. +- reg-offset : offset to apply to the mapbase from the start of the registers. +- reg-shift : quantity to shift the register offsets by. +- reg-io-width : the size (in bytes) of the IO accesses that should be + performed on the device. There are some systems that require 32-bit + accesses to the UART (e.g. TI davinci). +- used-by-rtas : set to indicate that the port is in use by the OpenFirmware + RTAS and should not be registered. +- no-loopback-test: set to indicate that the port does not implements loopback + test mode +- fifo-size: the fifo size of the UART. +- auto-flow-control: one way to enable automatic flow control support. The + driver is allowed to detect support for the capability even without this + property. +- has-hw-flow-control: the hardware has flow control capability. + +Example: + + uart@80230000 { + compatible = "ns8250"; + reg = <0x80230000 0x100>; + clock-frequency = <3686400>; + interrupts = <10>; + reg-shift = <2>; + }; diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt deleted file mode 100644 index 7705477..0000000 --- a/Documentation/devicetree/bindings/serial/of-serial.txt +++ /dev/null @@ -1,50 +0,0 @@ -* UART (Universal Asynchronous Receiver/Transmitter) - -Required properties: -- compatible : one of: - - "ns8250" - - "ns16450" - - "ns16550a" - - "ns16550" - - "ns16750" - - "ns16850" - - "nvidia,tegra20-uart" - - "nxp,lpc3220-uart" - - "ibm,qpace-nwp-serial" - - "altr,16550-FIFO32" - - "altr,16550-FIFO64" - - "altr,16550-FIFO128" - - "serial" if the port type is unknown. -- reg : offset and length of the register set for the device. -- interrupts : should contain uart interrupt. -- clock-frequency : the input clock frequency for the UART - or - clocks phandle to refer to the clk used as per Documentation/devicetree - /bindings/clock/clock-bindings.txt - -Optional properties: -- current-speed : the current active speed of the UART. -- reg-offset : offset to apply to the mapbase from the start of the registers. -- reg-shift : quantity to shift the register offsets by. -- reg-io-width : the size (in bytes) of the IO accesses that should be - performed on the device. There are some systems that require 32-bit - accesses to the UART (e.g. TI davinci). -- used-by-rtas : set to indicate that the port is in use by the OpenFirmware - RTAS and should not be registered. -- no-loopback-test: set to indicate that the port does not implements loopback - test mode -- fifo-size: the fifo size of the UART. -- auto-flow-control: one way to enable automatic flow control support. The - driver is allowed to detect support for the capability even without this - property. -- has-hw-flow-control: the hardware has flow control capability. - -Example: - - uart@80230000 { - compatible = "ns8250"; - reg = <0x80230000 0x100>; - clock-frequency = <3686400>; - interrupts = <10>; - reg-shift = <2>; - };