From patchwork Tue Oct 14 18:35:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 399534 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id AE97114007D for ; Wed, 15 Oct 2014 05:36:01 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754340AbaJNSf7 (ORCPT ); Tue, 14 Oct 2014 14:35:59 -0400 Received: from mail-wg0-f50.google.com ([74.125.82.50]:50768 "EHLO mail-wg0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755369AbaJNSf4 (ORCPT ); Tue, 14 Oct 2014 14:35:56 -0400 Received: by mail-wg0-f50.google.com with SMTP id a1so11755197wgh.9 for ; Tue, 14 Oct 2014 11:35:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ct+kGfHWrLWnGe+/mN79rVfGit+HqeOx/Ym8b2U9pEk=; b=rPPyIKKONcmAZj6dQtrEoYOUonjM7C7l1bDJOKkqC171Coxv0481WLRLnAqiwrqQ+p BSc3lR53yOGe4OBE4FvC3dZY2EIeCoIy8wyKB9pxQyjiqurVljbyuG8GCHjDmmKKnLI2 34GCqvzY8MnrkWlh75xUwGgjgj2Jdr6os8R8tVaLZwK+Ti14A8HfASrukwT3IBra0u07 de5+Ygjkp8BjNCBPhCyS19B4CuLrx/yYpZDm9lMwctxqfMKhbxS8jIMwa2SJo04pifA8 dSIXCJHhakFXMaJwSQeKmjRtRC/hOmZi7iXveM8ar2aIlLR7EliEHqxYlPFlgDDS39vq 4xBA== X-Received: by 10.194.243.131 with SMTP id wy3mr4101745wjc.129.1413311755286; Tue, 14 Oct 2014 11:35:55 -0700 (PDT) Received: from nuc.fastwebnet.it (2-238-57-164.ip242.fastwebnet.it. [2.238.57.164]) by mx.google.com with ESMTPSA id pm6sm21078873wjb.36.2014.10.14.11.35.53 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Oct 2014 11:35:54 -0700 (PDT) From: Carlo Caione To: p.zabel@pengutronix.de, grant.likely@linaro.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, b.galvani@gmail.com, jerry.cao@amlogic.com, victor.wan@amlogic.com, maxime.ripard@free-electrons.com Cc: Carlo Caione Subject: [PATCH v2 3/3] ARM: meson: docs: Add docs for MesonX reset controller Date: Tue, 14 Oct 2014 20:35:49 +0200 Message-Id: <1413311749-13948-4-git-send-email-carlo@caione.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1413311749-13948-1-git-send-email-carlo@caione.org> References: <1413311749-13948-1-git-send-email-carlo@caione.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Carlo Caione --- .../bindings/reset/amlogic,meson6-rst-mgr-ao.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson6-rst-mgr-ao.txt diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson6-rst-mgr-ao.txt b/Documentation/devicetree/bindings/reset/amlogic,meson6-rst-mgr-ao.txt new file mode 100644 index 0000000..4a8fd41 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/amlogic,meson6-rst-mgr-ao.txt @@ -0,0 +1,14 @@ +Amlogic MesonX Reset Manager (AO domain) + +Required properties: +- compatible : "amlogic,meson6-rst-mgr-ao" +- reg : Should contain 1 register ranges(address and length) +- #reset-cells: 1 + +Example: + + reset: reset@c8100040 { + #reset-cells = <1>; + compatible = "amlogic,meson6-rst-mgr-ao"; + reg = <0xc8100040 0x4>; + };