From patchwork Wed Jul 9 07:54:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 368119 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 28B8614009C for ; Wed, 9 Jul 2014 17:54:52 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753276AbaGIHyt (ORCPT ); Wed, 9 Jul 2014 03:54:49 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:43567 "EHLO mirror2.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753456AbaGIHys (ORCPT ); Wed, 9 Jul 2014 03:54:48 -0400 Received: by mirror2.csie.ntu.edu.tw (Postfix, from userid 1000) id C8B985FAAC; Wed, 9 Jul 2014 15:54:44 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard , Lee Jones , Samuel Ortiz , Rob Herring , Greg Kroah-Hartman , Emilio Lopez , Mike Turquette Cc: Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH v4 4/6] serial: 8250_dw: Add optional reset control support Date: Wed, 9 Jul 2014 15:54:37 +0800 Message-Id: <1404892479-12222-5-git-send-email-wens@csie.org> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1404892479-12222-1-git-send-email-wens@csie.org> References: <1404892479-12222-1-git-send-email-wens@csie.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The Allwinner A31 and A23 SoCs have a reset controller maintaining the UART in reset by default. This patch adds optional reset support to the driver. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt | 1 + drivers/tty/serial/8250/8250_dw.c | 9 +++++++++ 2 files changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt index f13f1c5..cb9af84 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt @@ -7,6 +7,7 @@ Required properties: - clock-frequency : the input clock frequency for the UART. Optional properties: +- resets : phandle to the parent reset controller. - reg-shift : quantity to shift the register offsets by. If this property is not present then the register offsets are not shifted. - reg-io-width : the size (in bytes) of the IO accesses that should be diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index 51b307a..cb1b3dc 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -59,6 +60,7 @@ struct dw8250_data { int last_mcr; int line; struct clk *clk; + struct reset_control *rst; struct uart_8250_dma dma; }; @@ -408,6 +410,10 @@ static int dw8250_probe(struct platform_device *pdev) uart.port.uartclk = clk_get_rate(data->clk); } + data->rst = devm_reset_control_get_optional(&pdev->dev, NULL); + if (!IS_ERR(data->rst)) + reset_control_deassert(data->rst); + data->dma.rx_chan_id = -1; data->dma.tx_chan_id = -1; data->dma.rx_param = data; @@ -451,6 +457,9 @@ static int dw8250_remove(struct platform_device *pdev) serial8250_unregister_port(data->line); + if (!IS_ERR(data->rst)) + reset_control_assert(data->rst); + if (!IS_ERR(data->clk)) clk_disable_unprepare(data->clk);