From patchwork Thu Jun 26 20:49:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 364726 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 31D37140086 for ; Fri, 27 Jun 2014 06:52:33 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751744AbaFZUuF (ORCPT ); Thu, 26 Jun 2014 16:50:05 -0400 Received: from mail-wi0-f171.google.com ([209.85.212.171]:41153 "EHLO mail-wi0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751738AbaFZUuB (ORCPT ); Thu, 26 Jun 2014 16:50:01 -0400 Received: by mail-wi0-f171.google.com with SMTP id n15so1797303wiw.16 for ; Thu, 26 Jun 2014 13:49:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Y+wMFH9v4pizUVMgqMAm2qZdD5SLCqE9vCpRqxv+9Sk=; b=QXJONBDCFw9lyV2WOjD9NUJ7o5fMkYFa3OsgvfYQWapzAW8yI/ONUVLXGYBROx/tx1 TDvVe6bbP4Ul7Bqlz6qh+BnAfSKqIU6LlczPSOj2ZvL3i0xhtLnmllkgIGhn0u7863Ih uYFmdwq6WLAS60GyJM+cSlnQ/SAJWxOglj9oNKtOFwyAXZjRASBUN4a/ijOCafPjUzEO PCF6YDZckStq49s2EYW7uy1HK2L3jaAv71pppf8SI8xhfAoBbn0k/e0c2hXWAHlNjd2w e8Lgeh8wIYJZ+R2hBIrh/CUyJASdF394L+Ua4sIA3v7Jc4DtVDJygnFvplQpgt4EmYuq bqjg== X-Received: by 10.180.109.101 with SMTP id hr5mr7135865wib.25.1403815799872; Thu, 26 Jun 2014 13:49:59 -0700 (PDT) Received: from localhost (port-12740.pppoe.wtnet.de. [84.46.49.245]) by mx.google.com with ESMTPSA id ek3sm16728209wjd.17.2014.06.26.13.49.58 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 26 Jun 2014 13:49:59 -0700 (PDT) From: Thierry Reding To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Stephen Warren , Arnd Bergmann , Will Deacon , Joerg Roedel Cc: Cho KyongHo , Grant Grundler , Dave Martin , Marc Zyngier , Hiroshi Doyu , Olav Haugan , Paul Walmsley , Rhyland Klein , Allen Martin , devicetree@vger.kernel.org, iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC 03/10] of: Add NVIDIA Tegra124 memory controller binding Date: Thu, 26 Jun 2014 22:49:43 +0200 Message-Id: <1403815790-8548-4-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1403815790-8548-1-git-send-email-thierry.reding@gmail.com> References: <1403815790-8548-1-git-send-email-thierry.reding@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thierry Reding The memory controller on NVIDIA Tegra124 exposes various knobs that can be used to tune the behaviour of the clients attached to it. In addition, the memory controller implements an SMMU (IOMMU) which can translate I/O virtual addresses to physical addresses for clients. This is useful for scatter-gather operation on devices that don't support it natively and for virtualization or process separation. Signed-off-by: Thierry Reding --- .../bindings/memory-controllers/nvidia,tegra124-mc.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.txt new file mode 100644 index 000000000000..4c922e839059 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-mc.txt @@ -0,0 +1,12 @@ +NVIDIA Tegra124 Memory Controller device tree bindings +====================================================== + +Required properties: +- compatible: Should be "nvidia,tegra124-mc" +- reg: Physical base address and length of the controller's registers. +- interrupts: The interrupt outputs from the controller. +- #iommu-cells: Should be 1. The single cell of the IOMMU specifier defines + the SWGROUP of the master. + +This device implements an IOMMU that complies with the generic IOMMU binding. +See ../iommu/iommu.txt for details.