From patchwork Fri Jun 20 15:01:22 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 362292 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E494814008B for ; Sat, 21 Jun 2014 01:11:04 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754509AbaFTPB4 (ORCPT ); Fri, 20 Jun 2014 11:01:56 -0400 Received: from top.free-electrons.com ([176.31.233.9]:37607 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755624AbaFTPBz (ORCPT ); Fri, 20 Jun 2014 11:01:55 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id 7C67E94E; Fri, 20 Jun 2014 17:01:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id F2BE388C; Fri, 20 Jun 2014 17:01:35 +0200 (CEST) From: Boris BREZILLON To: Nicolas Ferre , Jean-Christophe Plagniol-Villard , Alexandre Belloni , Thomas Gleixner , Jason Cooper Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Boris BREZILLON Subject: [PATCH v3 2/7] irqchip: atmel-aic: move binding doc to interrupt-controller directory Date: Fri, 20 Jun 2014 17:01:22 +0200 Message-Id: <1403276487-8792-3-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1403276487-8792-1-git-send-email-boris.brezillon@free-electrons.com> References: <1403276487-8792-1-git-send-email-boris.brezillon@free-electrons.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move atmel aic driver doc to the interrupt-controller directory as the new driver now lays in drivers/irqchip/atmel-aic.c. Signed-off-by: Boris BREZILLON --- .../devicetree/bindings/arm/atmel-aic.txt | 42 ---------------------- .../bindings/interrupt-controller/atmel,aic.txt | 42 ++++++++++++++++++++++ 2 files changed, 42 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/atmel-aic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt deleted file mode 100644 index 2742e9c..0000000 --- a/Documentation/devicetree/bindings/arm/atmel-aic.txt +++ /dev/null @@ -1,42 +0,0 @@ -* Advanced Interrupt Controller (AIC) - -Required properties: -- compatible: Should be "atmel,-aic" - can be "at91rm9200" or "sama5d3" -- interrupt-controller: Identifies the node as an interrupt controller. -- interrupt-parent: For single AIC system, it is an empty property. -- #interrupt-cells: The number of cells to define the interrupts. It should be 3. - The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). - The second cell is used to specify flags: - bits[3:0] trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. - Valid combinations are 1, 2, 3, 4, 8. - Default flag for internal sources should be set to 4 (active high). - The third cell is used to specify the irq priority from 0 (lowest) to 7 - (highest). -- reg: Should contain AIC registers location and length -- atmel,external-irqs: u32 array of external irqs. - -Examples: - /* - * AIC - */ - aic: interrupt-controller@fffff000 { - compatible = "atmel,at91rm9200-aic"; - interrupt-controller; - interrupt-parent; - #interrupt-cells = <3>; - reg = <0xfffff000 0x200>; - }; - - /* - * An interrupt generating device that is wired to an AIC. - */ - dma: dma-controller@ffffec00 { - compatible = "atmel,at91sam9g45-dma"; - reg = <0xffffec00 0x200>; - interrupts = <21 4 5>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt new file mode 100644 index 0000000..2742e9c --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/atmel,aic.txt @@ -0,0 +1,42 @@ +* Advanced Interrupt Controller (AIC) + +Required properties: +- compatible: Should be "atmel,-aic" + can be "at91rm9200" or "sama5d3" +- interrupt-controller: Identifies the node as an interrupt controller. +- interrupt-parent: For single AIC system, it is an empty property. +- #interrupt-cells: The number of cells to define the interrupts. It should be 3. + The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). + The second cell is used to specify flags: + bits[3:0] trigger type and level flags: + 1 = low-to-high edge triggered. + 2 = high-to-low edge triggered. + 4 = active high level-sensitive. + 8 = active low level-sensitive. + Valid combinations are 1, 2, 3, 4, 8. + Default flag for internal sources should be set to 4 (active high). + The third cell is used to specify the irq priority from 0 (lowest) to 7 + (highest). +- reg: Should contain AIC registers location and length +- atmel,external-irqs: u32 array of external irqs. + +Examples: + /* + * AIC + */ + aic: interrupt-controller@fffff000 { + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + interrupt-parent; + #interrupt-cells = <3>; + reg = <0xfffff000 0x200>; + }; + + /* + * An interrupt generating device that is wired to an AIC. + */ + dma: dma-controller@ffffec00 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffec00 0x200>; + interrupts = <21 4 5>; + };