From patchwork Tue Jun 3 21:13:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 355657 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 39ABE14009E for ; Wed, 4 Jun 2014 07:13:36 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754674AbaFCVNf (ORCPT ); Tue, 3 Jun 2014 17:13:35 -0400 Received: from exprod5og105.obsmtp.com ([64.18.0.180]:52057 "HELO exprod5og105.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1754632AbaFCVNe (ORCPT ); Tue, 3 Jun 2014 17:13:34 -0400 Received: from mail-pd0-f179.google.com ([209.85.192.179]) (using TLSv1) by exprod5ob105.postini.com ([64.18.4.12]) with SMTP ID DSNKU446fp7oq1Pp2KAaqIJ4/Efppp7Hqm1Q@postini.com; Tue, 03 Jun 2014 14:13:34 PDT Received: by mail-pd0-f179.google.com with SMTP id fp1so5159577pdb.10 for ; Tue, 03 Jun 2014 14:13:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rRV5S0dOjUuHUdVj0TMB9X0d1kjAwxktUOzWjSVZ6ac=; b=eFd5ekhgDFgBgsmvoMrFft+KBcAqu28faXe51d7tYujssL7+TmL+CeiOqsYtUidz1q +6brNq7nNUJNsvwwpRzwgA2SJyv6W2Ryy9KY/2bSgHBxQEhj0h5rpfciTHsTTQKYubfl npfCt75URaHb26E02RO61FziPijjlT0Q7l9QO6lcBLvV+u42nkIuneq/NT+NuabbY+E3 bS9/HFUrrmJAuZpkRXsMLdo2OyIaZ/xLehHNymxGBDfQ2MSlBjc7VC9e4IH68gH2Isxm HMBNJMTsjmAhiIapV6Kqu14V/hy2kQhF6JyKMTf6VYbsO7XY/IiV9tEnfFWVtERH7RMa RW3w== X-Gm-Message-State: ALoCoQlOM17rvXwsF86PpV1BDeVUoP0OgBKwlk9Ood4reEL06Lh5+FCri6ZY2Dy/VyoY+WOqyAbA71NaVLNGxEiG9cz1bbgwQeYg2Dw/B+e/1gsmMvmESWRzenUgbxGRJc8+nL6Mlade X-Received: by 10.68.194.134 with SMTP id hw6mr55156705pbc.49.1401830013717; Tue, 03 Jun 2014 14:13:33 -0700 (PDT) X-Received: by 10.68.194.134 with SMTP id hw6mr55156667pbc.49.1401830013462; Tue, 03 Jun 2014 14:13:33 -0700 (PDT) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id bz4sm1253908pbb.12.2014.06.03.14.13.32 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 03 Jun 2014 14:13:32 -0700 (PDT) From: Loc Ho To: chris@printf.net, ulf.hansson@linaro.org, michal.simek@xilinx.com Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jcm@redhat.com, patches@apm.com, Loc Ho Subject: [PATCH v2 1/3] Documentation: Update Arasan SDHC documentation for the APM X-Gene SoC SDHC DTS binding Date: Tue, 3 Jun 2014 15:13:03 -0600 Message-Id: <1401829985-5212-2-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1401829985-5212-1-git-send-email-lho@apm.com> References: <1401829985-5212-1-git-send-email-lho@apm.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch updates Arasan SDHC documentation for the APM X-Gene SoC SDHC controller DTS binding. Signed-off-by: Loc Ho --- .../devicetree/bindings/mmc/arasan,sdhci.txt | 16 ++++++++++++---- 1 files changed, 12 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index 98ee2ab..4dfcb9e 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -8,14 +8,22 @@ Device Tree Bindings for the Arasan SDHCI Controller [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt Required Properties: - - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' - - reg: From mmc bindings: Register location and length. - - clocks: From clock bindings: Handles to clock inputs. - - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb" + - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' or + 'apm,arasan,sdhci-8.9a' + - reg: First resource is the SDHC register location and length. + Second optional resource is the bridge translation register location + and length if required. - interrupts: Interrupt specifier - interrupt-parent: Phandle for the interrupt controller that services interrupts for this device. +Optional Properties: + - clocks: For format, refer to clock bindings. It requires two clocks if + specified - AHB clock and SDHC clock. + - clock-names: For format, refer to clock bindings. The clock corresponding + to the AHBC clock must be named "clk_ahb". The clock + corresponding to the SDHC clock must be named "clk_xin". + Example: sdhci@e0100000 { compatible = "arasan,sdhci-8.9a";