From patchwork Wed May 7 17:25:48 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 346748 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id CA0101400DF for ; Thu, 8 May 2014 03:27:41 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751521AbaEGR0L (ORCPT ); Wed, 7 May 2014 13:26:11 -0400 Received: from top.free-electrons.com ([176.31.233.9]:32897 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750878AbaEGR0H (ORCPT ); Wed, 7 May 2014 13:26:07 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id 37BA87A2; Wed, 7 May 2014 19:26:07 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 566EA7A2; Wed, 7 May 2014 19:26:06 +0200 (CEST) From: Boris BREZILLON To: =?UTF-8?q?Emilio=20L=C3=B3pez?= , Mike Turquette , Samuel Ortiz , Lee Jones Cc: Chen-Yu Tsai , Maxime Ripard , Philipp Zabel , Shuge , kevin@allwinnertech.com, Hans de Goede , Randy Dunlap , devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dev@linux-sunxi.org, Boris BREZILLON Subject: [PATCH v2 1/7] reset: sunxi: document sunxi's reset controllers bindings Date: Wed, 7 May 2014 19:25:48 +0200 Message-Id: <1399483554-8824-2-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1399483554-8824-1-git-send-email-boris.brezillon@free-electrons.com> References: <1399483554-8824-1-git-send-email-boris.brezillon@free-electrons.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT bindings documentation for sunxi's reset controllers. Signed-off-by: Boris BREZILLON Acked-by: Maxime Ripard --- .../bindings/reset/allwinner,sunxi-clock-reset.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt diff --git a/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt b/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt new file mode 100644 index 0000000..c8f7757 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt @@ -0,0 +1,21 @@ +Allwinner sunxi Peripheral Reset Controller +=========================================== + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +Required properties: +- compatible: Should be one of the following: + "allwinner,sun6i-a31-ahb1-reset" + "allwinner,sun6i-a31-clock-reset" +- reg: should be register base and length as documented in the + datasheet +- #reset-cells: 1, see below + +example: + +ahb1_rst: reset@01c202c0 { + #reset-cells = <1>; + compatible = "allwinner,sun6i-a31-ahb1-reset"; + reg = <0x01c202c0 0xc>; +};