From patchwork Mon Mar 31 15:18:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 335428 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 65AAD140095 for ; Tue, 1 Apr 2014 02:18:36 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753883AbaCaPSf (ORCPT ); Mon, 31 Mar 2014 11:18:35 -0400 Received: from mail-wg0-f46.google.com ([74.125.82.46]:46316 "EHLO mail-wg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753881AbaCaPSe (ORCPT ); Mon, 31 Mar 2014 11:18:34 -0400 Received: by mail-wg0-f46.google.com with SMTP id b13so6128763wgh.29 for ; Mon, 31 Mar 2014 08:18:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CcIiARblkRWJwSFPvxz6LzvHWBHFo7osJc/5u36zZ/U=; b=PTB0ClgYyaI2xsTM+VVxTg0FVa1wHATFsTACp0b2rwWEETXj8OjPI4tMwQadKdK3sy QNbY8b46XOAVIinfZ4HsZ34sayZ5wydR06V36092eeAanS30ySU9wmWKY95e27w8zquv p0dZuG4d/QWpANr4bLIIlb9ePcoL7RVnhSD5zL2MMgTR7QRhKhwVoS+hOa4S/4SLTp0j ckpyotxMDI/TDUtYEN9u7tTWKO4vgbWWXM6r0q5b5L1D1+BwYDwKs4mfCGGy7d+svZC1 t0XGZHhKpRqSZT6VDMO9zP6O9GdVkBAWFo7CShg1PJfN4A3V9wkOP+1LSEReDgnfhlzA c5Bw== X-Gm-Message-State: ALoCoQlXTr20wSjUMni+VSMDl5973+SLHEOrGfoG/KBDQJBJTG4jr3yq7Xj/tJrig282FbIi6iac X-Received: by 10.180.38.41 with SMTP id d9mr13109086wik.9.1396279112970; Mon, 31 Mar 2014 08:18:32 -0700 (PDT) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id wl6sm13547488wjb.3.2014.03.31.08.18.31 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 31 Mar 2014 08:18:32 -0700 (PDT) From: Ulf Hansson To: linux-arm-kernel@lists.infradead.org, Russell King , Linus Walleij Cc: devicetree@vger.kernel.org, Rob Herring , Ulf Hansson Subject: [PATCH V2 03/19] mmc: mmci: Update DT documentation Date: Mon, 31 Mar 2014 17:18:04 +0200 Message-Id: <1396279100-2920-4-git-send-email-ulf.hansson@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396279100-2920-1-git-send-email-ulf.hansson@linaro.org> References: <1396279100-2920-1-git-send-email-ulf.hansson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document how to configure the regulator supplies and add an example of a typical mmci DT node. Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mmci.txt | 39 ++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt index 2b584ca..ff233d1 100644 --- a/Documentation/devicetree/bindings/mmc/mmci.txt +++ b/Documentation/devicetree/bindings/mmc/mmci.txt @@ -8,8 +8,41 @@ by mmc.txt and the properties used by the mmci driver. Required properties: - compatible : contains "arm,pl18x", "arm,primecell". -- arm,primecell-periphid : contains the PrimeCell Peripheral ID. +- vmmc-supply : phandle to the regulator device tree node, mentioned + as the VCC/VDD supply in the eMMC/SD specs. Optional properties: -- mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable -- mmc-cap-sd-highspeed : indicates whether SD is high speed capable +- arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides + the ID provided by the HW +- mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable. +- mmc-cap-sd-highspeed : indicates whether SD is high speed capable. +- vqmmc-supply : phandle to the regulator device tree node, mentioned + as the VCCQ/VDD_IO supply in the eMMC/SD specs. + +Example: + +sdi0_per1@80126000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x80126000 0x1000>; + interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>; + + dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */ + <&dma 29 0 0x0>; /* Logical - MemToDev */ + dma-names = "rx", "tx"; + + clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>; + clock-names = "sdi", "apb_pclk"; + + max-frequency = <100000000>; + bus-width = <4>; + mmc-cap-sd-highspeed; + mmc-cap-mmc-highspeed; + cd-gpios = <&gpio2 31 0x4>; // 95 + + vmmc-supply = <&ab8500_ldo_aux3_reg>; + vqmmc-supply = <&vmmci>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdi0_default_mode>; + pinctrl-1 = <&sdi0_sleep_mode>; +};