diff mbox

[v2,3/3] Documentation: add devicetree bindings for Cavium Thunder SoC

Message ID 1395652179-9216-4-git-send-email-mohun106@gmail.com
State Superseded, archived
Headers show

Commit Message

Radha Mohan Chintakuntla March 24, 2014, 9:09 a.m. UTC
From: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>

This patch adds documentation for the devicetree bindings used by the
DT files of Cavium Thunder SoC platforms.

Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
---
 .../devicetree/bindings/arm/cavium-thunder.txt     |    9 +++++++++
 Documentation/devicetree/bindings/arm/cpus.txt     |    1 +
 2 files changed, 10 insertions(+), 0 deletions(-)

Comments

Arnd Bergmann March 24, 2014, 11 a.m. UTC | #1
On Monday 24 March 2014 14:39:39 mohun106@gmail.com wrote:
> diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder.txt b/Documentation/devicetree/bindings/arm/cavium-thunder.txt
> new file mode 100644
> index 0000000..6ea0a34
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/cavium-thunder.txt
> @@ -0,0 +1,9 @@
> +Cavium Thunder platform device tree bindings
> +---------------------------------------------
> +
> +Boards with Cavium's Thunder SoC shall have following properties.
> +
> +Root Node
> +---------
> +Required root node properties:
> +    - compatible = "cavium,thunder";
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index 333f4ae..f6cadf1 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below.
>                             "arm,cortex-r4"
>                             "arm,cortex-r5"
>                             "arm,cortex-r7"
> +                           "cavium,thunder"
>                             "faraday,fa526"
>                             "intel,sa110"
>                             "intel,sa1100"


It seems very confusing to use the same name for both the SoC and the
CPU core. Can you guarantee that there will never be another SoC with
the same core, or a different CPU core in a SoC with the same name?

If not, please be more specific here and use the exact model names
rather than the product names.

	Arnd
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Radha Mohan Chintakuntla March 25, 2014, 11:30 a.m. UTC | #2
On Mon, Mar 24, 2014 at 4:30 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> On Monday 24 March 2014 14:39:39 mohun106@gmail.com wrote:
>> diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder.txt b/Documentation/devicetree/bindings/arm/cavium-thunder.txt
>> new file mode 100644
>> index 0000000..6ea0a34
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/cavium-thunder.txt
>> @@ -0,0 +1,9 @@
>> +Cavium Thunder platform device tree bindings
>> +---------------------------------------------
>> +
>> +Boards with Cavium's Thunder SoC shall have following properties.
>> +
>> +Root Node
>> +---------
>> +Required root node properties:
>> +    - compatible = "cavium,thunder";
>> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
>> index 333f4ae..f6cadf1 100644
>> --- a/Documentation/devicetree/bindings/arm/cpus.txt
>> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
>> @@ -163,6 +163,7 @@ nodes to be present and contain the properties described below.
>>                             "arm,cortex-r4"
>>                             "arm,cortex-r5"
>>                             "arm,cortex-r7"
>> +                           "cavium,thunder"
>>                             "faraday,fa526"
>>                             "intel,sa110"
>>                             "intel,sa1100"
>
>
> It seems very confusing to use the same name for both the SoC and the
> CPU core. Can you guarantee that there will never be another SoC with
> the same core, or a different CPU core in a SoC with the same name?
>
> If not, please be more specific here and use the exact model names
> rather than the product names.

OK, will fix this once I discuss this internally.

>
>         Arnd
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder.txt b/Documentation/devicetree/bindings/arm/cavium-thunder.txt
new file mode 100644
index 0000000..6ea0a34
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cavium-thunder.txt
@@ -0,0 +1,9 @@ 
+Cavium Thunder platform device tree bindings
+---------------------------------------------
+
+Boards with Cavium's Thunder SoC shall have following properties.
+
+Root Node
+---------
+Required root node properties:
+    - compatible = "cavium,thunder";
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 333f4ae..f6cadf1 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -163,6 +163,7 @@  nodes to be present and contain the properties described below.
 			    "arm,cortex-r4"
 			    "arm,cortex-r5"
 			    "arm,cortex-r7"
+			    "cavium,thunder"
 			    "faraday,fa526"
 			    "intel,sa110"
 			    "intel,sa1100"