From patchwork Mon Feb 3 21:30:39 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Carino X-Patchwork-Id: 316334 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 39AEF2C0082 for ; Tue, 4 Feb 2014 08:32:32 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753869AbaBCVcL (ORCPT ); Mon, 3 Feb 2014 16:32:11 -0500 Received: from mail-qa0-f49.google.com ([209.85.216.49]:42969 "EHLO mail-qa0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753880AbaBCVcJ (ORCPT ); Mon, 3 Feb 2014 16:32:09 -0500 Received: by mail-qa0-f49.google.com with SMTP id w8so10831457qac.22 for ; Mon, 03 Feb 2014 13:32:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=x+vj5HfAhJXiXVG05SKH8RQ4HuKQ8CujfIAHbJLrIQg=; b=NIK8dBfeJIO5iBCKYj/TaWJWtW1pNRUozVBL58nIg7onHRWT3jV1cCHS4h6IthfICM ljrSEaELfiClIaSLm84dbQ1WhPNlpYugs+oZNmaaZFWywTPnDAhUHiCPWq0/a9MZKS9I mfL/fuzjQT8eM3fWEgNTMpE/cvED3WPmMDZa/0I7iqOzrudGwTcCHxFH1wEi0lbZyRXL mDGwwkz1nQoXTyUQSj487WQxWef/+6LKjTaK0Uu6BGDA91hHYfswkBUF5+XmMuiwWIVL LNC33GplCT/eutkfuiPwUGgUOYtoLN7cZ7VTV0f95360d3lMC/x2+P9mi6bAxIG1rOAe anMg== X-Received: by 10.140.31.75 with SMTP id e69mr57073993qge.76.1391463128426; Mon, 03 Feb 2014 13:32:08 -0800 (PST) Received: from ld-irv-0116.broadcom.com (5520-maca-inet1-outside.broadcom.com. [216.31.211.11]) by mx.google.com with ESMTPSA id b18sm60268816qaw.0.2014.02.03.13.32.06 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 03 Feb 2014 13:32:08 -0800 (PST) From: Marc Carino To: Christian Daudt , Arnd Bergmann , Olof Johansson Cc: Florian Fainelli , Matt Porter , Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Marc Carino Subject: [PATCH v6 6/8] ARM: brcmstb: add misc. DT bindings for brcmstb Date: Mon, 3 Feb 2014 13:30:39 -0800 Message-Id: <1391463041-15241-7-git-send-email-marc.ceeeee@gmail.com> X-Mailer: git-send-email 1.8.4.4 In-Reply-To: <1391463041-15241-1-git-send-email-marc.ceeeee@gmail.com> References: <1391463041-15241-1-git-send-email-marc.ceeeee@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the bindings that the Broadcom STB platform needs for proper bootup. Signed-off-by: Marc Carino Acked-by: Florian Fainelli --- .../devicetree/bindings/arm/brcm-brcmstb.txt | 95 ++++++++++++++++++++ 1 files changed, 95 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/brcm-brcmstb.txt diff --git a/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt new file mode 100644 index 0000000..3c436cc --- /dev/null +++ b/Documentation/devicetree/bindings/arm/brcm-brcmstb.txt @@ -0,0 +1,95 @@ +ARM Broadcom STB platforms Device Tree Bindings +----------------------------------------------- +Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants) +SoC shall have the following DT organization: + +Required root node properties: + - compatible: "brcm,bcm", "brcm,brcmstb" + +example: +/ { + #address-cells = <2>; + #size-cells = <2>; + model = "Broadcom STB (bcm7445)"; + compatible = "brcm,bcm7445", "brcm,brcmstb"; + +Further, syscon nodes that map platform-specific registers used for general +system control is required: + + - compatible: "brcm,bcm-sun-top-ctrl", "syscon" + - compatible: "brcm,bcm-hif-cpubiuctrl", "syscon" + - compatible: "brcm,bcm-hif-continuation", "syscon" + +example: + rdb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0 0x00 0xf0000000 0x1000000>; + + sun_top_ctrl: syscon@404000 { + compatible = "brcm,bcm7445-sun-top-ctrl", "syscon"; + reg = <0x404000 0x51c>; + }; + + hif_cpubiuctrl: syscon@3e2400 { + compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon"; + reg = <0x3e2400 0x5b4>; + }; + + hif_continuation: syscon@452000 { + compatible = "brcm,bcm7445-hif-continuation", "syscon"; + reg = <0x452000 0x100>; + }; + }; + +Lastly, nodes that allow for support of SMP initialization and reboot are +required: + +smpboot +------- +Required properties: + + - compatible + The string "brcm,brcmstb-smpboot". + + - syscon-cpu + A phandle / integer array property which lets the BSP know the location + of certain CPU power-on registers. + + The layout of the property is as follows: + o a phandle to the "hif_cpubiuctrl" syscon node + o offset to the base CPU power zone register + o offset to the base CPU reset register + + - syscon-cont + A phandle pointing to the syscon node which describes the CPU boot + continuation registers. + o a phandle to the "hif_continuation" syscon node + +example: + smpboot { + compatible = "brcm,brcmstb-smpboot"; + syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>; + syscon-cont = <&hif_continuation>; + }; + +reboot +------- +Required properties + + - compatible + The string property "brcm,brcmstb-reboot". + + - syscon + A phandle / integer array that points to the syscon node which describes + the general system reset registers. + o a phandle to "sun_top_ctrl" + o offset to the "reset source enable" register + o offset to the "software master reset" register + +example: + reboot { + compatible = "brcm,brcmstb-reboot"; + syscon = <&sun_top_ctrl 0x304 0x308>; + };