From patchwork Thu Jan 23 06:30:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Prisk X-Patchwork-Id: 313459 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 5717F2C0091 for ; Thu, 23 Jan 2014 17:30:10 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753090AbaAWGaJ (ORCPT ); Thu, 23 Jan 2014 01:30:09 -0500 Received: from server.prisktech.co.nz ([115.188.14.127]:55186 "EHLO server.prisktech.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750915AbaAWGaI (ORCPT ); Thu, 23 Jan 2014 01:30:08 -0500 Received: from localhost.localdomain (unknown [192.168.0.102]) by server.prisktech.co.nz (Postfix) with ESMTP id EF5A8FC11D4; Thu, 23 Jan 2014 19:30:17 +1300 (NZDT) From: Tony Prisk To: Rob Herring Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tony Prisk Subject: [PATCH] serial: vt8500: Add missing binding document for arch-vt8500 serial driver. Date: Thu, 23 Jan 2014 19:30:28 +1300 Message-Id: <1390458628-30152-1-git-send-email-linux@prisktech.co.nz> X-Mailer: git-send-email 1.7.9.5 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The binding document for the vt8500/wm8xxx SoC UART driver is missing. This patch adds the binding document. Signed-off-by: Tony Prisk --- .../devicetree/bindings/serial/vt8500-uart.txt | 26 ++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/vt8500-uart.txt diff --git a/Documentation/devicetree/bindings/serial/vt8500-uart.txt b/Documentation/devicetree/bindings/serial/vt8500-uart.txt new file mode 100644 index 0000000..795c393 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/vt8500-uart.txt @@ -0,0 +1,26 @@ +* VIA VT8500 and WonderMedia WM8xxx UART Controller + +Required properties: +- compatible: should be "via,vt8500-uart" + +- reg: base physical address of the controller and length of memory mapped + region. + +- interrupts: hardware interrupt number + +- clocks: shall be the input parent clock phandle for the clock. This should + be the 24Mhz reference clock. + +Aliases may be defined to ensure the correct ordering of the uarts. + +Example: + aliases { + serial0 = &uart0; + }; + + uart0: serial@d8200000 { + compatible = "via,vt8500-uart"; + reg = <0xd8200000 0x1040>; + interrupts = <32>; + clocks = <&clkuart0>; + };