From patchwork Wed Jan 22 14:35:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 313264 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 0AF4A2C00AE for ; Thu, 23 Jan 2014 01:36:36 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755901AbaAVOgX (ORCPT ); Wed, 22 Jan 2014 09:36:23 -0500 Received: from mailout4.w1.samsung.com ([210.118.77.14]:22997 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755891AbaAVOgT (ORCPT ); Wed, 22 Jan 2014 09:36:19 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MZT00F8Y4KIDR70@mailout4.w1.samsung.com>; Wed, 22 Jan 2014 14:36:18 +0000 (GMT) X-AuditID: cbfec7f5-b7fc96d000004885-31-52dfd761bbf2 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 15.A2.18565.167DFD25; Wed, 22 Jan 2014 14:36:17 +0000 (GMT) Received: from AMDC1061.digital.local ([106.116.147.88]) by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01 (7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0MZT00JHK4K8L3B0@eusync2.samsung.com>; Wed, 22 Jan 2014 14:36:17 +0000 (GMT) From: Andrzej Hajda To: dri-devel@lists.freedesktop.org Cc: Andrzej Hajda , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Grant Likely , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Inki Dae , Kyungmin Park , Thierry Reding , Tomasz Figa Subject: [RFC PATCH 3/9] exynos/dsim: add DT bindings Date: Wed, 22 Jan 2014 15:35:29 +0100 Message-id: <1390401336-22915-4-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.8.3.2 In-reply-to: <1390401336-22915-1-git-send-email-a.hajda@samsung.com> References: <1390401336-22915-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrLLMWRmVeSWpSXmKPExsVy+t/xK7qJ1+8HGbx+x2pxa905Vov5R4DE la/v2Sz63yxktTjwZwejxblXKxktJt2fwGJxtukNu8WM8/uYLJZev8hkMWH6WhaL1r1H2C3W z3jNYvFz1zwWBz6PNfPWMHpc7utl8tg56y67x8rlX9g8Nq3qZPO4c20Pm8f97uNMHn1bVjF6 fN4kF8AZxWWTkpqTWZZapG+XwJWx8t0VloKzwhWnT31ib2DsF+hi5OSQEDCR2HzwNjuELSZx 4d56ti5GLg4hgaWMEnfbz7CBJIQE+pgkduwrArHZBDQl/m6+CRYXEVCW+DtxFSNIA7PAO2aJ ravOgiWEBUwlbu+7BjaVRUBVYv6Zp8wgNq+As8SGFR0sENsUJJZ9WQsW5xRwkWhbv4sRYpmz xPK1y9knMPIuYGRYxSiaWppcUJyUnmukV5yYW1yal66XnJ+7iRESxF93MC49ZnWIUYCDUYmH N2DXvSAh1sSy4srcQ4wSHMxKIrypl+8HCfGmJFZWpRblxxeV5qQWH2Jk4uCUamCcJ8na9nla aHzKqbhbNy639Cn6W/+ru8I59dWnVzlbLnEmawocDF3+wiP11Y4n4Z87Dn1vOJISbFS6UjzG m9OjePV0rVUTTpQLi5k3RVeazFmY7rmjRuKcfb+Y6sM1X6fa3Hyq9XemCu9lgQMCLRFPNLMe CzxjuR82UeBMxTX1qYu2PZ3E3TNPiaU4I9FQi7moOBEAmAog9UACAAA= Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The patch adds DT bindings for Exynos DSI Master. DSIM follows rules for DSI bus host bindings [1]. Other properties describes its resources: memory, interrupt, clocks, phy, regulators. There is only one configuration property: pll-clock-frequency. [1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt Signed-off-by: Andrzej Hajda --- .../devicetree/bindings/video/exynos_dsim.txt | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/video/exynos_dsim.txt diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt b/Documentation/devicetree/bindings/video/exynos_dsim.txt new file mode 100644 index 0000000..0246e26 --- /dev/null +++ b/Documentation/devicetree/bindings/video/exynos_dsim.txt @@ -0,0 +1,48 @@ +Exynos MIPI DSI Master + +Required properties: + - compatible: "samsung,exynos4210-mipi-dsi" + - reg: physical base address and length of the registers set for the device + - interrupts: should contain DSI interrupt + - clocks: list of clock specifiers, must contain an entry for each required + entry in clock-names + - clock-names: should include "bus_clk"and "pll_clk" entries + - phys: list of phy specifiers, must contain an entry for each required + entry in phy-names + - phy-names: should include "dsim" entry + - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V) + - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V) + - pll-clock-frequency: specifies frequency of "pll_clk" clock + - #address-cells, #size-cells: should be set respectively to <1> and <0> + according to DSI host bindings (see MIPI DSI bindings [1]) + +Optional properties: + - samsung,power-domain: a phandle to DSIM power domain node + +Child nodes: + Should contain DSI peripheral nodes (see DSI bindings [1]) + +[1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt + +Example: + + dsi@11C80000 { + compatible = "samsung,exynos4210-mipi-dsi"; + reg = <0x11C80000 0x10000>; + interrupts = <0 79 0>; + clocks = <&clock 286>, <&clock 143>; + clock-names = "bus_clk", "pll_clk"; + phys = <&mipi_phy 1>; + phy-names = "dsim"; + vddcore-supply = <&vusb_reg>; + vddio-supply = <&vmipi_reg>; + samsung,power-domain = <&pd_lcd0>; + #address-cells = <1>; + #size-cells = <0>; + pll-clock-frequency = <24000000>; + + panel@0 { + reg = <0>; + ... + }; + };