From patchwork Wed Nov 20 21:34:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerhard Sittig X-Patchwork-Id: 292872 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E0D802C0092 for ; Thu, 21 Nov 2013 08:35:36 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750858Ab3KTVfg (ORCPT ); Wed, 20 Nov 2013 16:35:36 -0500 Received: from mail-out.m-online.net ([212.18.0.9]:54354 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750796Ab3KTVfe (ORCPT ); Wed, 20 Nov 2013 16:35:34 -0500 Received: from frontend1.mail.m-online.net (unknown [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3dPxyr3KD1z4KK6k; Wed, 20 Nov 2013 22:35:32 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3dPxyr1np9zbbcm; Wed, 20 Nov 2013 22:35:32 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.180]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id BnHG53CbATA1; Wed, 20 Nov 2013 22:35:30 +0100 (CET) X-Auth-Info: 3g0AzygGJQ8UzrWodjPLQ46QaNmOpTwq/5CND2vsaSY= Received: from localhost (kons-4d027821.pool.mediaWays.net [77.2.120.33]) by mail.mnet-online.de (Postfix) with ESMTPA; Wed, 20 Nov 2013 22:35:30 +0100 (CET) From: Gerhard Sittig To: Cc: Gerhard Sittig , Mark Rutland , "Rob Herring@" , Pawel Moll , Arnd Bergmann Subject: [PATCH v1 1/1] dt: binding: reword PowerPC 8xxx GPIO documentation Date: Wed, 20 Nov 2013 22:34:53 +0100 Message-Id: <1384983293-11002-1-git-send-email-gsi@denx.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <201311182328.40743.arnd@arndb.de> References: <201311182328.40743.arnd@arndb.de> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org re-format and re-word the device tree binding documentation for MPC8xxx and compatibles, reference the common document for interrupt controllers and remove outdated duplicate SoC specific information Cc: Mark Rutland Cc: Rob Herring@ Cc: Pawel Moll Cc: Arnd Bergmann Cc: Signed-off-by: Gerhard Sittig Acked-by: Arnd Bergmann --- This change should improve the "flow" of the 8xxx GPIO binding document, starting with an overview, then discussing specific properties, and then collecting examples at the end. Re-formatting should improve readability of enumerations. I was not certain whether the kinds of changes to the document warrant a split into several patches, separating whitespace/reformatting and the content update. For the moment I went with a single patch to not overcomplicate matters. Putting the interrupt-parent before the interrupts specifiers is a thing of personal taste -- I'm a fan of hierarchy, finding the specific detail first and then the addendum "oh, by the way, it's that other parent" keeps confusing me as much as top-posting in email does. :) Feel free to tell me when I got terminology wrong. This is the only real issue that may remain after this change IMO. .../devicetree/bindings/gpio/8xxx_gpio.txt | 59 ++++++++++++-------- 1 file changed, 35 insertions(+), 24 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt b/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt index b0019eb5330e..7788e8df3a15 100644 --- a/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt +++ b/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt @@ -5,16 +5,41 @@ This is for the non-QE/CPM/GUTs GPIO controllers as found on Every GPIO controller node must have #gpio-cells property defined, this information will be used to translate gpio-specifiers. +See bindings/gpio/gpio.txt for details of how to specify GPIO +information for devices. + +The GPIO module usually is connected to the SoC's internal interrupt +controller, see bindings/interrupt-controller/interrupts.txt (the +interrupt client nodes section) for details how to specify this GPIO +module's interrupt. + +The GPIO module may serve as another interrupt controller (cascaded to +the SoC's internal interrupt controller). See the interrupt controller +nodes section in bindings/interrupt-controller/interrupts.txt for +details. Required properties: -- compatible : "fsl,-gpio" followed by "fsl,mpc8349-gpio" for - 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx. -- #gpio-cells : Should be two. The first cell is the pin number and the - second cell is used to specify optional parameters (currently unused). - - interrupts : Interrupt mapping for GPIO IRQ. - - interrupt-parent : Phandle for the interrupt controller that - services interrupts for this device. -- gpio-controller : Marks the port as GPIO controller. +- compatible: "fsl,-gpio" followed by "fsl,mpc8349-gpio" + for 83xx, "fsl,mpc8572-gpio" for 85xx and + "fsl,mpc8610-gpio" for 86xx. +- #gpio-cells: Should be two. The first cell is the pin number + and the second cell is used to specify optional + parameters (currently unused). +- interrupt-parent: Phandle for the interrupt controller that + services interrupts for this device. +- interrupts: Interrupt mapping for GPIO IRQ. +- gpio-controller: Marks the port as GPIO controller. + +Optional properties: +- interrupt-controller: Empty boolean property which marks the GPIO + module as an IRQ controller. +- #interrupt-cells: Number of integer cells required to specify an + interrupt within this interrupt controller. The + first cell defines the pin number, the second + cell defines additional flags (trigger type, + trigger polarity). Note that the specific set + of trigger conditions supported by the GPIO + module depends on the actual SoC. Example of gpio-controller nodes for a MPC8347 SoC: @@ -36,25 +61,11 @@ Example of gpio-controller nodes for a MPC8347 SoC: gpio-controller; }; -See booting-without-of.txt for details of how to specify GPIO -information for devices. - -To use GPIO pins as interrupt sources for peripherals, specify the -GPIO controller as the interrupt parent and define GPIO number + -trigger mode using the interrupts property, which is defined like -this: - -interrupts = , where: - - number: GPIO pin (0..31) - - trigger: trigger mode: - 2 = trigger on falling edge - 3 = trigger on both edges - -Example of device using this is: +Example of a peripheral using the GPIO module as an IRQ controller: funkyfpga@0 { compatible = "funky-fpga"; ... - interrupts = <4 3>; interrupt-parent = <&gpio1>; + interrupts = <4 3>; };