From patchwork Tue Nov 19 23:53:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 292608 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id BA7A52C011F for ; Wed, 20 Nov 2013 10:53:40 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753496Ab3KSXxi (ORCPT ); Tue, 19 Nov 2013 18:53:38 -0500 Received: from exprod5og107.obsmtp.com ([64.18.0.184]:54208 "HELO exprod5og107.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1752720Ab3KSXxh (ORCPT ); Tue, 19 Nov 2013 18:53:37 -0500 Received: from mail-pb0-f47.google.com ([209.85.160.47]) (using TLSv1) by exprod5ob107.postini.com ([64.18.4.12]) with SMTP ID DSNKUov6AAGfZTSDG5+q/uc2CLnqM9yA6sM7@postini.com; Tue, 19 Nov 2013 15:53:37 PST Received: by mail-pb0-f47.google.com with SMTP id um1so2646239pbc.34 for ; Tue, 19 Nov 2013 15:53:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2hohdevHmj+yPe7M3u5791gL5NymILf2qhIYNp9JVuc=; b=igw6IWlhJeqb59ShRNsqeowqRU7dbze0zAAIOo60LOmp7ROIvPLAHGEtF3fdqsNvW+ RMA3gMse+HOcWN2/mqzBq0qIRJDN2BtnvSrgD0DcNGN3buqJv5wjokfBc3yifbPcmwrw UZgNa6EMcaW/ehvcQpVPveXLBb0o72st4GGSQrQH+JmgjNbhT/jemE+Z8r0EjJ/H7Kwe 0IrK1OmVMf0Zw4B4rwt22DT0mtt/2kHorgB1fuHdvRWmbxGyPlbmPSX3NKHR6OjW+As9 49HehWSgIZBgwuq0WOk9sYmc/fbQkT+IKQH1us95dVID1e3VXuROZTmfWvbCq8juqN/9 G/DA== X-Gm-Message-State: ALoCoQkXgjnju7cA+AW/+xOnavC2OzFlaQNzRjcQvq7IxNut/QKkFhJoA5jftrxuA0YhUB8BkfjfZZlP0XQPhGFBQ9OmSUrQlJB+LCUU5PxEGBu8SBhfcd5t5vDgQNrGoQDea4b+PgQhZJO+UpgATAYNBwxPgyYYC963+psZLDL5iXYnvo0LWuk= X-Received: by 10.66.164.41 with SMTP id yn9mr29270324pab.100.1384905216303; Tue, 19 Nov 2013 15:53:36 -0800 (PST) X-Received: by 10.66.164.41 with SMTP id yn9mr29270315pab.100.1384905216159; Tue, 19 Nov 2013 15:53:36 -0800 (PST) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id sd3sm33195309pbb.42.2013.11.19.15.53.35 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 19 Nov 2013 15:53:35 -0800 (PST) From: Loc Ho To: olof@lixom.net, tj@kernel.org, arnd@arndb.de Cc: linux-scsi@vger.kernel.org, linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jcm@redhat.com, Loc Ho , Tuan Phan , Suman Tripathi Subject: [PATCH v2 2/4] Documentation: Add APM X-Gene SoC 6.0Gbps SATA PHY driver binding documentation Date: Tue, 19 Nov 2013 16:53:15 -0700 Message-Id: <1384905197-3566-3-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1384905197-3566-2-git-send-email-lho@apm.com> References: <1384905197-3566-1-git-send-email-lho@apm.com> <1384905197-3566-2-git-send-email-lho@apm.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Documentation: Add APM X-Gene SoC 6.0Gbps SATA PHY driver binding documentation Document the DTS binding for the X-Gene SoC SATA PHY driver. Signed-off-by: Loc Ho Signed-off-by: Tuan Phan Signed-off-by: Suman Tripathi --- .../devicetree/bindings/ata/apm-xgene-phy.txt | 61 ++++++++++++++++++++ 1 files changed, 61 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/apm-xgene-phy.txt diff --git a/Documentation/devicetree/bindings/ata/apm-xgene-phy.txt b/Documentation/devicetree/bindings/ata/apm-xgene-phy.txt new file mode 100644 index 0000000..bbae164 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/apm-xgene-phy.txt @@ -0,0 +1,61 @@ +* APM X-Gene 6.0 Gb/s SATA PHY nodes + +SATA PHY nodes are defined to describe on-chip Serial ATA PHY. Each SATA PHY +(pair of PHY) has its own node. + +Required properties: +- compatible : Shall be "apm,xgene-ahci-phy" or + "apm,xgene-ahci-phy2". The "apm,xgene-ahci-phy" + describes an port shared with SGMII Ethernet port. + The "apm,xgene-ahci-phy2" describes an port not + shared with SGMII and the PLL located at another + memory resource region. +- reg : First PHY memory resource + Second separate PHY PLL clock memory resource if + type "apm,xgene-ahci-phy2" +- #phy-cells : Shall be 0 + +Optional properties: +- status : Shall be "ok" if enabled or "na" if disabled. Default + is "ok". +- txeyetuning : Manual control to fine tune the capture of the serial + bit lines from the automatic calibrated position. + Two set of 3-tuple setting for Gen1, Gen2, and Gen3. + Range from 0 to 0x7f. Default is 0xa. +- txeyedirection : Eye tuning manual control direction. 0 means sample + data earlier than the nominal sampling point. 1 means + sample data later than the nominal sampling point. + Two set of 3-tuple setting for Gen1, Gen2, and Gen3. + Default is 0x0. +- txboostgain : Frequency boost and DC gain control. Two set of + 3-tuple setting for Gen1, Gen2, and Gen3. Range is + between 0 to 0x1f. Default is 0x3. +- txspeed : Tx operating speed. Two set of 3-tuple for + Gen1 (0x1), Gen2 (0x3), and Gen3 (0x7). Default is + 0x7. + +NOTE: PHY override parameters are board specific setting. + +Example: + sataphy0: sataphy@1f210000 { + compatible = "apm,xgene-ahci-phy"; + reg = <0x0 0x1f210000 0x0 0x10000>; + #phy-cells = <0>; + status = "na"; + }; + + sataphy1: sataphy@1f220000 { + compatible = "apm,xgene-ahci-phy"; + reg = <0x0 0x1f220000 0x0 0x10000>; + #phy-cells = <0>; + status = "ok"; + }; + + sataphy2: sataphy@1f230000 { + compatible = "apm,xgene-ahci-phy2"; + reg = <0x0 0x1f230000 0x0 0x10000 + 0x0 0x1f2d0000 0x0 0x10000 >; + #phy-cells = <0>; + status = "ok"; + }; +