From patchwork Tue Nov 12 06:36:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Naveen Krishna Ch X-Patchwork-Id: 290538 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4D2842C0099 for ; Tue, 12 Nov 2013 17:35:21 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752610Ab3KLGfU (ORCPT ); Tue, 12 Nov 2013 01:35:20 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:27827 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751178Ab3KLGfR (ORCPT ); Tue, 12 Nov 2013 01:35:17 -0500 Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MW500MHS0YGPQ40@mailout3.samsung.com>; Tue, 12 Nov 2013 15:35:05 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.123]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id 68.32.07052.81CC1825; Tue, 12 Nov 2013 15:35:04 +0900 (KST) X-AuditID: cbfee691-b7f866d000001b8c-e6-5281cc187272 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id BD.B2.09687.81CC1825; Tue, 12 Nov 2013 15:35:04 +0900 (KST) Received: from naveen-linux.sisodomain.com ([107.108.83.161]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MW500L4O0YBG030@mmp2.samsung.com>; Tue, 12 Nov 2013 15:35:04 +0900 (KST) From: Naveen Krishna Chatradhi To: linux-pm@vger.kernel.org Cc: naveenkrishna.ch@gmail.com, rui.zhang@intel.com, eduardo.valentin@ti.com, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, amit.daniel@samsung.com, kgene.kim@samsung.com, devicetree@vger.kernel.org, b.zolnierkie@samsung.com, cpgs@samsung.com, t.figa@samsung.com Subject: [PATCH 2/4 v9] thermal: samsung: change base_common to more meaningful base_second Date: Tue, 12 Nov 2013 12:06:35 +0530 Message-id: <1384238195-24592-1-git-send-email-ch.naveen@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1378268629-2886-2-git-send-email-ch.naveen@samsung.com> References: <1378268629-2886-2-git-send-email-ch.naveen@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuplkeLIzCtJLcpLzFFi42JZI2JSrStxpjHI4EW/iUXD1RCLjTPWs1q8 PKRpMf/IOVaLNft/Mln0LrjKZnF51xw2i8+9RxgtZpzfx2SxaNt/ZosnD/vYLNbPeM3iwOOx c9Zddo/Fe14yefRtWcXocfzGdiaPz5vkAlijuGxSUnMyy1KL9O0SuDLm/+1iLzinU3HuVDNL A+NtlS5GTg4JAROJA9+7WSFsMYkL99azgdhCAksZJbr3BcLUrN66iqmLkQsoPp1RYveKrywQ Tg+TxKprU5lAqtgEzCQOLlrNDmKLCMhITL2ynxWkiFlgPpPEoT9rgRIcHMICsRKvnoBtYBFQ lfi+8QALiM0r4Cqx4lsP1BWKEt3PJoDVcALFPz7/wQhxkYvE/pdrmEFmSggcYpd4/OE8M8Qg AYlvkw+xgMyXEJCV2HSAGWKOpMTBFTdYJjAKL2BkWMUomlqQXFCclF5kqlecmFtcmpeul5yf u4kRGBWn/z2buIPx/gHrQ4zJQOMmMkuJJucDoyqvJN7Q2MzIwtTE1NjI3NKMNGElcd70R0lB QgLpiSWp2ampBalF8UWlOanFhxiZODilGhi3v9vCNsnEsFy7T3Jd9a6Fjm1FEktZX+t+z2f8 9W2ZmPUvwYAd5t8NKp7anTTZ3ttlrOnF+k5et11Q20E0UEDF3cZ66bZ4nrOOrp51lvs3PPSa dGqreXnStZ3Jj3aqFtxmy7heEcAb27BsdnR89J5flpyveCe+K9O8mHF8uWR1VprW508+q5VY ijMSDbWYi4oTAX+5GlugAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNIsWRmVeSWpSXmKPExsVy+t9jQV2JM41BBtPXqFg0XA2x2DhjPavF y0OaFvOPnGO1WLP/J5NF74KrbBaXd81hs/jce4TRYsb5fUwWi7b9Z7Z48rCPzWL9jNcsDjwe O2fdZfdYvOclk0ffllWMHsdvbGfy+LxJLoA1qoHRJiM1MSW1SCE1Lzk/JTMv3VbJOzjeOd7U zMBQ19DSwlxJIS8xN9VWycUnQNctMwfoPCWFssScUqBQQGJxsZK+HaYJoSFuuhYwjRG6viFB cD1GBmggYQ1jxvy/XewF53Qqzp1qZmlgvK3SxcjJISFgIrF66yomCFtM4sK99WxdjFwcQgLT GSV2r/jKAuH0MEmsujYVrIpNwEzi4KLV7CC2iICMxNQr+1lBipgF5jNJHPqzFijBwSEsECvx 6gkbSA2LgKrE940HWEBsXgFXiRXfelghtilKdD+bAFbDCRT/+PwHI4gtJOAisf/lGuYJjLwL GBlWMYqmFiQXFCel5xrqFSfmFpfmpesl5+duYgRH3TOpHYwrGywOMQpwMCrx8O7gagwSYk0s K67MPcQowcGsJMIbvhgoxJuSWFmVWpQfX1Sak1p8iDEZ6KqJzFKiyfnAhJBXEm9obGJuamxq aWJhYmZJmrCSOO+BVutAIYH0xJLU7NTUgtQimC1MHJxSDYzHFjpvr/x3X36p3dTQBXeq2q8J Lcssk1/f5cx4Vbc8dvtZv1Wfrfauy1vjkXfB5PCsO29WTI7tYdg9p9aGI6hStfXRCqmLbn83 CUkUhK08WKN8YwZD48/QqmAli40+UcvO/70hsmHDArY7rDqyL77NWygntFOvU5PplPjUsj1H o50KJZekuhUpsRRnJBpqMRcVJwIAaU3dkv4CAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Exynos5440 and Exynos5420 there are registers common across the TMU channels. To support that, we introduced a ADDRESS_MULTIPLE flag in the driver and the 2nd set of register base and size are provided in the "reg" property of the node. As per Amit's suggestion, this patch changes the base_common to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE. Signed-off-by: Naveen Krishna Chatradhi --- Changes since v8: None .../devicetree/bindings/thermal/exynos-thermal.txt | 4 ++-- drivers/thermal/samsung/exynos_tmu.c | 14 +++++++------- drivers/thermal/samsung/exynos_tmu.h | 4 ++-- drivers/thermal/samsung/exynos_tmu_data.c | 2 +- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt index 284f530..116cca0 100644 --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt @@ -11,8 +11,8 @@ - reg : Address range of the thermal registers. For soc's which has multiple instances of TMU and some registers are shared across all TMU's like interrupt related then 2 set of register has to supplied. First set - belongs to each instance of TMU and second set belongs to common TMU - registers. + belongs to each instance of TMU and second set belongs to second set + of common TMU registers. - interrupts : Should contain interrupt for thermal system - clocks : The main clock for TMU device - clock-names : Thermal system clock name diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index c493245..bbd0fc3 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -41,7 +41,7 @@ * @id: identifier of the one instance of the TMU controller. * @pdata: pointer to the tmu platform/configuration data * @base: base address of the single instance of the TMU controller. - * @base_common: base address of the common registers of the TMU controller. + * @base_second: base address of the common registers of the TMU controller. * @irq: irq number of the TMU controller. * @soc: id of the SOC type. * @irq_work: pointer to the irq work structure. @@ -56,7 +56,7 @@ struct exynos_tmu_data { int id; struct exynos_tmu_platform_data *pdata; void __iomem *base; - void __iomem *base_common; + void __iomem *base_second; int irq; enum soc_type soc; struct work_struct irq_work; @@ -297,7 +297,7 @@ skip_calib_data: } /*Clear the PMIN in the common TMU register*/ if (reg->tmu_pmin && !data->id) - writel(0, data->base_common + reg->tmu_pmin); + writel(0, data->base_second + reg->tmu_pmin); out: clk_disable(data->clk); mutex_unlock(&data->lock); @@ -454,7 +454,7 @@ static void exynos_tmu_work(struct work_struct *work) /* Find which sensor generated this interrupt */ if (reg->tmu_irqstatus) { - val_type = readl(data->base_common + reg->tmu_irqstatus); + val_type = readl(data->base_second + reg->tmu_irqstatus); if (!((val_type >> data->id) & 0x1)) goto out; } @@ -579,7 +579,7 @@ static int exynos_map_dt_data(struct platform_device *pdev) * Check if the TMU shares some registers and then try to map the * memory of common registers. */ - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) + if (!TMU_SUPPORTS(pdata, ADDRESS_MULTIPLE)) return 0; if (of_address_to_resource(pdev->dev.of_node, 1, &res)) { @@ -587,9 +587,9 @@ static int exynos_map_dt_data(struct platform_device *pdev) return -ENODEV; } - data->base_common = devm_ioremap(&pdev->dev, res.start, + data->base_second = devm_ioremap(&pdev->dev, res.start, resource_size(&res)); - if (!data->base_common) { + if (!data->base_second) { dev_err(&pdev->dev, "Failed to ioremap memory\n"); return -ENOMEM; } diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h index 980859a..0d6b32f 100644 --- a/drivers/thermal/samsung/exynos_tmu.h +++ b/drivers/thermal/samsung/exynos_tmu.h @@ -60,7 +60,7 @@ enum soc_type { * state(active/idle) can be checked. * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation * sample time. - * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU + * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU * sensors shares some common registers. * TMU_SUPPORT - macro to compare the above features with the supplied. */ @@ -70,7 +70,7 @@ enum soc_type { #define TMU_SUPPORT_FALLING_TRIP BIT(3) #define TMU_SUPPORT_READY_STATUS BIT(4) #define TMU_SUPPORT_EMUL_TIME BIT(5) -#define TMU_SUPPORT_SHARED_MEMORY BIT(6) +#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6) #define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b) diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c index 7cdb04e..1d27069 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.c +++ b/drivers/thermal/samsung/exynos_tmu_data.c @@ -255,7 +255,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = { .type = SOC_ARCH_EXYNOS5440, \ .registers = &exynos5440_tmu_registers, \ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \ - TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY), + TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE), struct exynos_tmu_init_data const exynos5440_default_tmu_data = { .tmu_data = {