From patchwork Tue Nov 12 06:34:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leela Krishna Amudala X-Patchwork-Id: 290537 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 500F72C0087 for ; Tue, 12 Nov 2013 17:15:21 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751541Ab3KLGPU (ORCPT ); Tue, 12 Nov 2013 01:15:20 -0500 Received: from mailout1.samsung.com ([203.254.224.24]:41071 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751421Ab3KLGPM (ORCPT ); Tue, 12 Nov 2013 01:15:12 -0500 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MW500AK900UF7S0@mailout1.samsung.com>; Tue, 12 Nov 2013 15:15:06 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.124]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id F8.FB.08406.967C1825; Tue, 12 Nov 2013 15:15:06 +0900 (KST) X-AuditID: cbfee68e-b7f416d0000020d6-7c-5281c769ebaf Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 07.B8.08134.967C1825; Tue, 12 Nov 2013 15:15:05 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MW500MJ400O7UA0@mmp1.samsung.com>; Tue, 12 Nov 2013 15:15:05 +0900 (KST) From: Leela Krishna Amudala To: linux-samsung-soc@vger.kernel.org, kgene.kim@samsung.com, wim@iguana.be Cc: t.figa@samsung.com, devicetree@vger.kernel.org, dianders@chromium.org, linux-watchdog@vger.kernel.org, cpgs@samsung.com, sachin.kamat@linaro.org Subject: [PATCH V8 2/3] watchdog: s3c2410_wdt: add device tree support and use syscon regmap interface to configure pmu register Date: Tue, 12 Nov 2013 12:04:47 +0530 Message-id: <1384238088-9862-3-git-send-email-l.krishna@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1384238088-9862-1-git-send-email-l.krishna@samsung.com> References: <1384238088-9862-1-git-send-email-l.krishna@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrHLMWRmVeSWpSXmKPExsWyRsSkRjfreGOQwe8uVouXhzQt5h85x2px dtlBNoveBVfZLGac38dkcWPdPnaLk396GS3Wz3jNYnFrxgtWB06P2Q0XWTyubRbzuHNtD5tH 35ZVjB6fN8kFsEZx2aSk5mSWpRbp2yVwZfz5v5StoD+o4tjqeywNjOecuxg5OSQETCQ2nTnF BGGLSVy4t54NxBYSWMoocbmfr4uRA6ym7x5rFyMXUHgRo8SB3gmMEM5sJon3KxvZQRrYBIwl 7s/dDDZIRMBb4sOEB2wgRcwC0xglVm1qYAZxhAWaGCX+vzjLBjKWRUBVomG+D0gDr4CLxMtl O9ggrlCU6H42AczmFHCVmHCqnwXiIheJCbuvgJ0hIbCOXWLr4WNgm1kEBCS+TT7EAnGqrMSm A8wQcyQlDq64wTKBUXgBI8MqRtHUguSC4qT0IiO94sTc4tK8dL3k/NxNjMCwP/3vWd8OxpsH rA8xJgONm8gsJZqcD4ybvJJ4Q2MzIwtTE1NjI3NLM9KElcR5Fz1MChISSE8sSc1OTS1ILYov Ks1JLT7EyMTBKdXAuGiWxrzDaaKSd1n3KdjvMpPjlL55xTfnz6Ub39wfujOJ/ZjUcOBOwZtp VlK89U5qqzU+/29pCNPudb6txaHksegI/171T+Uf1ZhV1p6ULdJ8LH7w9KmSvcuT/m1tSOna mnOOdfoqUw3DiSr3nphdttlikrchd/9joXJXJzE7qRcx1vmut15tVmIpzkg01GIuKk4EAJW9 DEqRAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsVy+t9jAd3M441BBksmmlu8PKRpMf/IOVaL s8sOsln0LrjKZjHj/D4mixvr9rFbnPzTy2ixfsZrFotbM16wOnB6zG64yOJxbbOYx51re9g8 +rasYvT4vEkugDWqgdEmIzUxJbVIITUvOT8lMy/dVsk7ON453tTMwFDX0NLCXEkhLzE31VbJ xSdA1y0zB+geJYWyxJxSoFBAYnGxkr4dpgmhIW66FjCNEbq+IUFwPUYGaCBhDWPGn/9L2Qr6 gyqOrb7H0sB4zrmLkYNDQsBEou8eaxcjJ5ApJnHh3nq2LkYuDiGBRYwSB3onMEI4s5kk3q9s ZAepYhMwlrg/dzMTiC0i4C3xYcIDsA5mgWmMEqs2NTCDOMICTYwS/1+cZQNZwSKgKtEw3wek gVfAReLlsh1sEOsUJbqfTQCzOQVcJSac6mcBsYWAaibsvsI6gZF3ASPDKkbR1ILkguKk9Fwj veLE3OLSvHS95PzcTYzguHomvYNxVYPFIUYBDkYlHt4dXI1BQqyJZcWVuYcYJTiYlUR4wxcD hXhTEiurUovy44tKc1KLDzEmAx01kVlKNDkfGPN5JfGGxibmpsamliYWJmaWpAkrifMebLUO FBJITyxJzU5NLUgtgtnCxMEp1cA49fHeHU6H84MKpcXmT5oUOHflie+/33+UkynfnTkn6XdP Wp9OzMR63q+hxxP+MiQ/criuVtMo+bqjd9472Z/LniuddrBwPKTieeeAnIjCtGeCgXWnr8+N OXKcccW+xV9UXhx98Df+Oq8i871WkzpXx+9nA5ylvgfzt+epZu3LMnnw5bK88SR3JZbijERD Leai4kQA2dFaze8CAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree support and use syscon regmap interface to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of watchdog in probe and s2r scenarios. Signed-off-by: Leela Krishna Amudala --- .../devicetree/bindings/watchdog/samsung-wdt.txt | 21 ++- drivers/watchdog/Kconfig | 1 + drivers/watchdog/s3c2410_wdt.c | 148 ++++++++++++++++++-- 3 files changed, 161 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt index 2aa486c..5dea363 100644 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt @@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset event has not occurred. Required properties: -- compatible : should be "samsung,s3c2410-wdt" +- compatible : should be one among the following + (a) "samsung,s3c2410-wdt" for Exynos4 and previous SoCs + (b) "samsung,exynos5250-wdt" for Exynos5250 + (c) "samsung,exynos5420-wdt" for Exynos5420 + - reg : base physical address of the controller and length of memory mapped region. - interrupts : interrupt number to the cpu. +- samsung,syscon-phandle : reference to syscon node (This property required only + in case of compatible being "samsung,exynos5250-wdt" or "samsung,exynos5420-wdt". + In case of Exynos5250 and 5420 this property points to syscon node holding the PMU + base address) Optional properties: - timeout-sec : contains the watchdog timeout in seconds. + +Example: + +watchdog@101D0000 { + compatible = "samsung,exynos5250-wdt"; + reg = <0x101D0000 0x100>; + interrupts = <0 42 0>; + clocks = <&clock 336>; + clock-names = "watchdog"; + samsung,syscon-phandle = <&pmu_sys_reg>; +}; diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index d1d53f3..0d272ae 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -188,6 +188,7 @@ config S3C2410_WATCHDOG tristate "S3C2410 Watchdog" depends on HAVE_S3C2410_WATCHDOG select WATCHDOG_CORE + select MFD_SYSCON if ARCH_EXYNOS5 help Watchdog timer block in the Samsung SoCs. This will reboot the system when the timer expires with the watchdog enabled. diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 23aad7c..ccf755d 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -41,6 +41,8 @@ #include #include #include +#include +#include #define S3C2410_WTCON 0x00 #define S3C2410_WTDAT 0x04 @@ -61,6 +63,10 @@ #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0) #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15) +#define WDT_DISABLE_REG_OFFSET 0x0408 +#define WDT_MASK_RESET_REG_OFFSET 0x040c +#define QUIRK_NEEDS_PMU_CONFIG (1 << 0) + static bool nowayout = WATCHDOG_NOWAYOUT; static int tmr_margin; static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT; @@ -84,6 +90,13 @@ MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, " "0 to reboot (default 0)"); MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug (default 0)"); +struct s3c2410_wdt_variant { + int disable_reg; + int mask_reset_reg; + int mask_bit; + u32 quirks; +}; + struct s3c2410_wdt { struct device *dev; struct clk *clock; @@ -94,8 +107,50 @@ struct s3c2410_wdt { unsigned long wtdat_save; struct watchdog_device wdt_device; struct notifier_block freq_transition; + struct s3c2410_wdt_variant *pmu_config; + struct regmap *pmureg; +}; + +static const struct s3c2410_wdt_variant pmu_config_s3c2410 = { + .quirks = 0 +}; + +#ifdef CONFIG_OF +static const struct s3c2410_wdt_variant pmu_config_5250 = { + .disable_reg = WDT_DISABLE_REG_OFFSET, + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET, + .mask_bit = 20, + .quirks = QUIRK_NEEDS_PMU_CONFIG }; +static const struct s3c2410_wdt_variant pmu_config_5420 = { + .disable_reg = WDT_DISABLE_REG_OFFSET, + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET, + .mask_bit = 0, + .quirks = QUIRK_NEEDS_PMU_CONFIG +}; + +static const struct of_device_id s3c2410_wdt_match[] = { + { .compatible = "samsung,s3c2410-wdt", + .data = &pmu_config_s3c2410 }, + { .compatible = "samsung,exynos5250-wdt", + .data = &pmu_config_5250 }, + { .compatible = "samsung,exynos5420-wdt", + .data = &pmu_config_5420 }, + {}, +}; +MODULE_DEVICE_TABLE(of, s3c2410_wdt_match); +#endif + +static const struct platform_device_id s3c2410_wdt_ids[] = { + { + .name = "s3c2410-wdt", + .driver_data = (unsigned long)&pmu_config_s3c2410, + }, + {} +}; +MODULE_DEVICE_TABLE(platform, s3c2410_wdt_ids); + /* watchdog control routines */ #define DBG(fmt, ...) \ @@ -111,6 +166,30 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct notifier_block *nb) return container_of(nb, struct s3c2410_wdt, freq_transition); } +static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool mask) +{ + int ret; + u32 mask_val = 1 << wdt->pmu_config->mask_bit; + u32 val = 0; + + if (mask) + val = mask_val; + + ret = regmap_update_bits(wdt->pmureg, + wdt->pmu_config->disable_reg, + mask_val, val); + if (ret < 0) + return ret; + + ret = regmap_update_bits(wdt->pmureg, + wdt->pmu_config->mask_reset_reg, + mask_val, val); + if (ret < 0) + return ret; + + return 0; +} + static int s3c2410wdt_keepalive(struct watchdog_device *wdd) { struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); @@ -332,6 +411,20 @@ static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt) } #endif +/* s3c2410_get_wdt_driver_data */ +static inline struct s3c2410_wdt_variant * +get_wdt_drv_data(struct platform_device *pdev) +{ + if (pdev->dev.of_node) { + const struct of_device_id *match; + match = of_match_node(s3c2410_wdt_match, pdev->dev.of_node); + return (struct s3c2410_wdt_variant *)match->data; + } else { + return (struct s3c2410_wdt_variant *) + platform_get_device_id(pdev)->driver_data; + } +} + static int s3c2410wdt_probe(struct platform_device *pdev) { struct device *dev; @@ -354,6 +447,16 @@ static int s3c2410wdt_probe(struct platform_device *pdev) spin_lock_init(&wdt->lock); wdt->wdt_device = s3c2410_wdd; + wdt->pmu_config = get_wdt_drv_data(pdev); + if (wdt->pmu_config->quirks & QUIRK_NEEDS_PMU_CONFIG) { + wdt->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node, + "samsung,syscon-phandle"); + if (IS_ERR(wdt->pmureg)) { + dev_err(dev, "syscon regmap lookup failed.\n"); + return PTR_ERR(wdt->pmureg); + } + } + wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (wdt_irq == NULL) { dev_err(dev, "no irq resource specified\n"); @@ -444,6 +547,14 @@ static int s3c2410wdt_probe(struct platform_device *pdev) (wtcon & S3C2410_WTCON_RSTEN) ? "en" : "dis", (wtcon & S3C2410_WTCON_INTEN) ? "en" : "dis"); + if (wdt->pmu_config->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, false); + if (ret < 0) { + dev_warn(wdt->dev, "failed to update pmu register"); + goto err_cpufreq; + } + } + return 0; err_cpufreq: @@ -459,8 +570,15 @@ static int s3c2410wdt_probe(struct platform_device *pdev) static int s3c2410wdt_remove(struct platform_device *dev) { + int ret; struct s3c2410_wdt *wdt = platform_get_drvdata(dev); + if (wdt->pmu_config->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, true); + if (ret < 0) + dev_warn(wdt->dev, "failed to update pmu register"); + } + watchdog_unregister_device(&wdt->wdt_device); s3c2410wdt_cpufreq_deregister(wdt); @@ -473,8 +591,15 @@ static int s3c2410wdt_remove(struct platform_device *dev) static void s3c2410wdt_shutdown(struct platform_device *dev) { + int ret; struct s3c2410_wdt *wdt = platform_get_drvdata(dev); + if (wdt->pmu_config->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, true); + if (ret < 0) + dev_warn(wdt->dev, "failed to update pmu register"); + } + s3c2410wdt_stop(&wdt->wdt_device); } @@ -482,12 +607,19 @@ static void s3c2410wdt_shutdown(struct platform_device *dev) static int s3c2410wdt_suspend(struct device *dev) { + int ret; struct s3c2410_wdt *wdt = dev_get_drvdata(dev); /* Save watchdog state, and turn it off. */ wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON); wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT); + if (wdt->pmu_config->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, true); + if (ret < 0) + dev_warn(wdt->dev, "failed to update pmu register"); + } + /* Note that WTCNT doesn't need to be saved. */ s3c2410wdt_stop(&wdt->wdt_device); @@ -496,6 +628,7 @@ static int s3c2410wdt_suspend(struct device *dev) static int s3c2410wdt_resume(struct device *dev) { + int ret; struct s3c2410_wdt *wdt = dev_get_drvdata(dev); /* Restore watchdog state. */ @@ -503,6 +636,12 @@ static int s3c2410wdt_resume(struct device *dev) writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */ writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON); + if (wdt->pmu_config->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, false); + if (ret < 0) + dev_warn(wdt->dev, "failed to update pmu register"); + } + dev_info(dev, "watchdog %sabled\n", (wdt->wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis"); @@ -513,18 +652,11 @@ static int s3c2410wdt_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(s3c2410wdt_pm_ops, s3c2410wdt_suspend, s3c2410wdt_resume); -#ifdef CONFIG_OF -static const struct of_device_id s3c2410_wdt_match[] = { - { .compatible = "samsung,s3c2410-wdt" }, - {}, -}; -MODULE_DEVICE_TABLE(of, s3c2410_wdt_match); -#endif - static struct platform_driver s3c2410wdt_driver = { .probe = s3c2410wdt_probe, .remove = s3c2410wdt_remove, .shutdown = s3c2410wdt_shutdown, + .id_table = s3c2410_wdt_ids, .driver = { .owner = THIS_MODULE, .name = "s3c2410-wdt",