From patchwork Wed Dec 7 21:04:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joshua Clayton X-Patchwork-Id: 703746 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tYrdx11k5z9t3N for ; Thu, 8 Dec 2016 08:06:45 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="AceOysOG"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753409AbcLGVGn (ORCPT ); Wed, 7 Dec 2016 16:06:43 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:34429 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753415AbcLGVGl (ORCPT ); Wed, 7 Dec 2016 16:06:41 -0500 Received: by mail-pf0-f193.google.com with SMTP id y68so21084992pfb.1; Wed, 07 Dec 2016 13:04:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=T6R2oSWmddYFEMAvyEE6J/JFHowNSIHJnC5cSSbZqYY=; b=AceOysOG4cfYkJuwv0SGNuvlH7Qa1fQ20Z4eVitPYlWknnuA5Lf5XCyuwrosh2sde7 Zk1iY2zYMCvaOr8LDnUOZx/mcACn1Y3CS3f/iQ3NbEBz0Sbgae7Qx5hOxi3x5SFEozO1 I5bWnzbpAwUC/TOzL8J5DlfZIyYv08U8hLpZTQql9HnM/JU2Onds/CDrMOXiuto78Dm9 EygoSn6AqZrp4K8ODKt+ys40GEUAF4egdM62pVHzy8I2S/3S2uh0z2k7O6xIUi6UpPGl iuDThJPDc+LBaTD+cSPac/ei57y8xc90g2FWx5KRAwSPOkb6/0CuXFxzFzzjy1aQ5A5x TF6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=T6R2oSWmddYFEMAvyEE6J/JFHowNSIHJnC5cSSbZqYY=; b=SoD59N09a5LD0s4BrD1vS6Cwdg0FQUB0T1GRZA6i8TSzPLljgoBR2PDQKgpenvIjU6 bH7DNMClDFzBlOC0y4iMb7aBi6/3hC78j0la+gB8rLW86Q2GEmdBcdENZVOLDTNt1Dcq JnOl6Oqa6sfkrB+SepgfHVWkrp3gL1zN/IrzlPBy0+upBEyYXt4MViNOjqm4pF8I5yoa y/63VpO+cfU9BL3oqDfXY4JcsI1Xsdt1z7mb04kjKZPnECYqalznPdMohS4PENSXCp6c NCP4QiQZ/JIEbCaHCPQQcl9GyWnPxDznAVXes3gU7K7VWVOhrdk9cZoqew2Ta0xJXauQ OE0w== X-Gm-Message-State: AKaTC02gk7Y0tjc33DFvvpPLqpVoZBsPhPkOq5r/4LTPXo/UEWFmWSs8Ng+uI1XE4pyVQw== X-Received: by 10.84.128.65 with SMTP id 59mr152784777pla.109.1481144698221; Wed, 07 Dec 2016 13:04:58 -0800 (PST) Received: from jclayton-pc.columbia.uniwest.com (68-185-59-186.static.knwc.wa.charter.com. [68.185.59.186]) by smtp.gmail.com with ESMTPSA id 24sm44704876pfh.41.2016.12.07.13.04.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Dec 2016 13:04:56 -0800 (PST) From: Joshua Clayton To: Alan Tull , Moritz Fischer , Mark Rutland , Russell King Cc: Rob Herring , Anatolij Gustschin , Joshua Clayton , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 2/3] doc: dt: add cyclone-ps-spi binding document Date: Wed, 7 Dec 2016 13:04:39 -0800 Message-Id: <0825a00c127aff5933d8ca991810af00b9bc19dc.1481139171.git.stillcompiling@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Describe a cyclone-ps-spi devicetree entry, required features Signed-off-by: Joshua Clayton Acked-by: Rob Herring --- .../bindings/fpga/cyclone-ps-spi-fpga-mgr.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt diff --git a/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt new file mode 100644 index 0000000..3f515c7 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/cyclone-ps-spi-fpga-mgr.txt @@ -0,0 +1,25 @@ +Altera Cyclone Passive Serial SPI FPGA Manager + +Altera Cyclone FPGAs support a method of loading the bitstream over what is +referred to as "passive serial". +The passive serial link is not technically spi, and might require extra +circuits in order to play nicely with other spi slaves on the same bus. + +See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf + +Required properties: +- compatible : should contain "altr,cyclone-ps-spi-fpga-mgr" +- reg : spi slave id of the fpga +- config-gpios : config pin (referred to as nCONFIG in the cyclone manual) +- status-gpios : status pin (referred to as nSTATUS in the cyclone manual) + +both gpios pins are normally active low open drain. + +Example: + fpga_spi: evi-fpga-spi@0 { + compatible = "altr,cyclone-ps-spi-fpga-mgr"; + spi-max-frequency = <20000000>; + reg = <0>; + config-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; + status-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + };