| Message ID | 0309d18d-d5d8-ab59-9c15-79b4093e0a51@cogentembedded.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | Add R8A77980/Condor board support | expand |
Hi Sergei, On Fri, Feb 2, 2018 at 7:31 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC > driver. > > Based on the original (and large) patch by Vladimir Barinov. > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Thanks for your patch! > --- /dev/null > +++ renesas/drivers/soc/renesas/r8a77980-sysc.c > @@ -0,0 +1,52 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Renesas R-Car V3H System Controller > + * > + * Copyright (C) 2018 Renesas Electronics Corp. > + * Copyright (C) 2018 Cogent Embedded, Inc. > + */ > + > +#include <linux/bug.h> > +#include <linux/kernel.h> > + > +#include <dt-bindings/power/r8a77980-sysc.h> > + > +#include "rcar-sysc.h" > + > +static const struct rcar_sysc_area r8a77980_areas[] __initconst = { > + { "always-on", 0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, > + { "ca53-scu", 0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON, > + PD_SCU }, > + { "ca53-cpu0", 0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU, > + PD_CPU_NOCR }, > + { "ca53-cpu1", 0x200, 1, R8A77980_PD_CA53_CPU1, R8A77980_PD_CA53_SCU, > + PD_CPU_NOCR }, > + { "ca53-cpu2", 0x200, 2, R8A77980_PD_CA53_CPU2, R8A77980_PD_CA53_SCU, > + PD_CPU_NOCR }, > + { "ca53-cpu3", 0x200, 3, R8A77980_PD_CA53_CPU3, R8A77980_PD_CA53_SCU, > + PD_CPU_NOCR }, > + { "cr7", 0x240, 0, R8A77980_PD_CR7, R8A77980_PD_ALWAYS_ON }, > + { "a3ir", 0x180, 0, R8A77980_PD_A3IR, R8A77980_PD_ALWAYS_ON }, > + { "a2ir0", 0x400, 0, R8A77980_PD_A2IR0, R8A77980_PD_ALWAYS_ON }, > + { "a2ir1", 0x400, 1, R8A77980_PD_A2IR1, R8A77980_PD_A2IR0 }, > + { "a2ir2", 0x400, 2, R8A77980_PD_A2IR2, R8A77980_PD_A2IR0 }, > + { "a2ir3", 0x400, 3, R8A77980_PD_A2IR3, R8A77980_PD_A2IR0 }, > + { "a2ir4", 0x400, 4, R8A77980_PD_A2IR4, R8A77980_PD_A2IR0 }, > + { "a2ir5", 0x400, 5, R8A77980_PD_A2IR5, R8A77980_PD_A2IR0 }, Shouldn't all a2irN domains have a3ir as their parent? > + { "a2sc0", 0x400, 6, R8A77980_PD_A2SC0, R8A77980_PD_ALWAYS_ON }, > + { "a2sc1", 0x400, 7, R8A77980_PD_A2SC1, R8A77980_PD_A2SC0 }, > + { "a2sc2", 0x400, 8, R8A77980_PD_A2SC2, R8A77980_PD_A2SC0 }, > + { "a2sc3", 0x400, 9, R8A77980_PD_A2SC3, R8A77980_PD_A2SC0 }, > + { "a2sc4", 0x400, 10, R8A77980_PD_A2SC4, R8A77980_PD_A2SC0 }, Shouldn't all a2scN domains have a3ir as their parent? > + { "a2pd0", 0x400, 11, R8A77980_PD_A2PD0, R8A77980_PD_ALWAYS_ON }, > + { "a2pd1", 0x400, 12, R8A77980_PD_A2PD1, R8A77980_PD_A2PD0 }, Shouldn't all a2pdN domains have a3ir as their parent? > + { "a2cn", 0x400, 13, R8A77980_PD_A2CN, R8A77980_PD_ALWAYS_ON }, Shouldn't the a2cn domain have a3ir as its parent? > + { "a3vip", 0x2c0, 0, R8A77980_PD_A3VIP, R8A77980_PD_ALWAYS_ON }, > + { "a3vip1", 0x300, 0, R8A77980_PD_A3VIP1, R8A77980_PD_A3VIP }, > + { "a3vip2", 0x280, 0, R8A77980_PD_A3VIP2, R8A77980_PD_A3VIP }, With the above fixed: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Feb 02, 2018 at 09:31:47PM +0300, Sergei Shtylyov wrote: > Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC > driver. > > Based on the original (and large) patch by Vladimir Barinov. > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> For the record, this matches my reading of the documentation: Reviewed-by: Simon Horman <horms+renesas@verge.net.au> ... > Index: renesas/drivers/soc/renesas/r8a77980-sysc.c > =================================================================== > --- /dev/null > +++ renesas/drivers/soc/renesas/r8a77980-sysc.c > @@ -0,0 +1,52 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Renesas R-Car V3H System Controller > + * > + * Copyright (C) 2018 Renesas Electronics Corp. > + * Copyright (C) 2018 Cogent Embedded, Inc. > + */ > + > +#include <linux/bug.h> > +#include <linux/kernel.h> > + > +#include <dt-bindings/power/r8a77980-sysc.h> > + > +#include "rcar-sysc.h" > + > +static const struct rcar_sysc_area r8a77980_areas[] __initconst = { > + { "always-on", 0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, > + { "ca53-scu", 0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON, > + PD_SCU }, > + { "ca53-cpu0", 0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU, > + PD_CPU_NOCR }, ... The above seems consistent with existing usage of struct rcar_sysc_area, however, I am wondering if any consideration has been given to using symbolic names for the register offsets that are the 2nd field of the structure. Something like this for the values used in this patch: #define RCAR_GEN3_SYSCSR 0 #define RCAR_GEN3_PWRSR3 0x140 #define RCAR_GEN3_PWRSR4 0x180 #define RCAR_GEN3_PWRSR6 0x200 #define RCAR_GEN3_PWRSR7 0x240 #define RCAR_GEN3_PWRSR11 0x400 #define RCAR_GEN3_PWRSR12 0x2c0 #define RCAR_GEN3_PWRSR13 0x300 #define RCAR_GEN3_PWRSR14 0x280 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 02/07/2018 01:29 PM, Simon Horman wrote: >> Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC >> driver. >> >> Based on the original (and large) patch by Vladimir Barinov. >> >> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> >> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > For the record, this matches my reading of the documentation: > > Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Thank you! :-) > ... > >> Index: renesas/drivers/soc/renesas/r8a77980-sysc.c >> =================================================================== >> --- /dev/null >> +++ renesas/drivers/soc/renesas/r8a77980-sysc.c >> @@ -0,0 +1,52 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Renesas R-Car V3H System Controller >> + * >> + * Copyright (C) 2018 Renesas Electronics Corp. >> + * Copyright (C) 2018 Cogent Embedded, Inc. >> + */ >> + >> +#include <linux/bug.h> >> +#include <linux/kernel.h> >> + >> +#include <dt-bindings/power/r8a77980-sysc.h> >> + >> +#include "rcar-sysc.h" >> + >> +static const struct rcar_sysc_area r8a77980_areas[] __initconst = { >> + { "always-on", 0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, >> + { "ca53-scu", 0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON, >> + PD_SCU }, >> + { "ca53-cpu0", 0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU, >> + PD_CPU_NOCR }, > > ... > > The above seems consistent with existing usage of struct rcar_sysc_area, > however, I am wondering if any consideration has been given to using > symbolic names for the register offsets that are the 2nd field of the > structure. Something like this for the values used in this patch: > > #define RCAR_GEN3_SYSCSR 0 > #define RCAR_GEN3_PWRSR3 0x140 > #define RCAR_GEN3_PWRSR4 0x180 > #define RCAR_GEN3_PWRSR6 0x200 > #define RCAR_GEN3_PWRSR7 0x240 > #define RCAR_GEN3_PWRSR11 0x400 > #define RCAR_GEN3_PWRSR12 0x2c0 > #define RCAR_GEN3_PWRSR13 0x300 > #define RCAR_GEN3_PWRSR14 0x280 No. Perhaps a good idea indeed... MBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello! On 02/05/2018 04:23 PM, Geert Uytterhoeven wrote: >> Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC >> driver. >> >> Based on the original (and large) patch by Vladimir Barinov. >> >> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> >> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > Thanks for your patch! > >> --- /dev/null >> +++ renesas/drivers/soc/renesas/r8a77980-sysc.c >> @@ -0,0 +1,52 @@ [...] >> +static const struct rcar_sysc_area r8a77980_areas[] __initconst = { >> + { "always-on", 0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, >> + { "ca53-scu", 0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON, >> + PD_SCU }, >> + { "ca53-cpu0", 0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU, >> + PD_CPU_NOCR }, >> + { "ca53-cpu1", 0x200, 1, R8A77980_PD_CA53_CPU1, R8A77980_PD_CA53_SCU, >> + PD_CPU_NOCR }, >> + { "ca53-cpu2", 0x200, 2, R8A77980_PD_CA53_CPU2, R8A77980_PD_CA53_SCU, >> + PD_CPU_NOCR }, >> + { "ca53-cpu3", 0x200, 3, R8A77980_PD_CA53_CPU3, R8A77980_PD_CA53_SCU, >> + PD_CPU_NOCR }, >> + { "cr7", 0x240, 0, R8A77980_PD_CR7, R8A77980_PD_ALWAYS_ON }, >> + { "a3ir", 0x180, 0, R8A77980_PD_A3IR, R8A77980_PD_ALWAYS_ON }, >> + { "a2ir0", 0x400, 0, R8A77980_PD_A2IR0, R8A77980_PD_ALWAYS_ON }, >> + { "a2ir1", 0x400, 1, R8A77980_PD_A2IR1, R8A77980_PD_A2IR0 }, >> + { "a2ir2", 0x400, 2, R8A77980_PD_A2IR2, R8A77980_PD_A2IR0 }, >> + { "a2ir3", 0x400, 3, R8A77980_PD_A2IR3, R8A77980_PD_A2IR0 }, >> + { "a2ir4", 0x400, 4, R8A77980_PD_A2IR4, R8A77980_PD_A2IR0 }, >> + { "a2ir5", 0x400, 5, R8A77980_PD_A2IR5, R8A77980_PD_A2IR0 }, > > Shouldn't all a2irN domains have a3ir as their parent? Maybe.... I'd looked at the r8a77970-sysc.c and it also had A2IR0 as parent to all other A2IR<n> clocks. >> + { "a2sc0", 0x400, 6, R8A77980_PD_A2SC0, R8A77980_PD_ALWAYS_ON }, >> + { "a2sc1", 0x400, 7, R8A77980_PD_A2SC1, R8A77980_PD_A2SC0 }, >> + { "a2sc2", 0x400, 8, R8A77980_PD_A2SC2, R8A77980_PD_A2SC0 }, >> + { "a2sc3", 0x400, 9, R8A77980_PD_A2SC3, R8A77980_PD_A2SC0 }, >> + { "a2sc4", 0x400, 10, R8A77980_PD_A2SC4, R8A77980_PD_A2SC0 }, > > Shouldn't all a2scN domains have a3ir as their parent? Why A3IR? >> + { "a2pd0", 0x400, 11, R8A77980_PD_A2PD0, R8A77980_PD_ALWAYS_ON }, >> + { "a2pd1", 0x400, 12, R8A77980_PD_A2PD1, R8A77980_PD_A2PD0 }, > > Shouldn't all a2pdN domains have a3ir as their parent? Again, why? > >> + { "a2cn", 0x400, 13, R8A77980_PD_A2CN, R8A77980_PD_ALWAYS_ON }, > > Shouldn't the a2cn domain have a3ir as its parent? ? >> + { "a3vip", 0x2c0, 0, R8A77980_PD_A3VIP, R8A77980_PD_ALWAYS_ON }, >> + { "a3vip1", 0x300, 0, R8A77980_PD_A3VIP1, R8A77980_PD_A3VIP }, >> + { "a3vip2", 0x280, 0, R8A77980_PD_A3VIP2, R8A77980_PD_A3VIP }, > > With the above fixed: > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > Gr{oetje,eeting}s, > > Geert MBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 02/15/2018 07:48 PM, Sergei Shtylyov wrote: >>> Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC >>> driver. >>> >>> Based on the original (and large) patch by Vladimir Barinov. >>> >>> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> >>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> >> >> Thanks for your patch! >> >>> --- /dev/null >>> +++ renesas/drivers/soc/renesas/r8a77980-sysc.c >>> @@ -0,0 +1,52 @@ > [...] >>> +static const struct rcar_sysc_area r8a77980_areas[] __initconst = { >>> + { "always-on", 0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, >>> + { "ca53-scu", 0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON, >>> + PD_SCU }, >>> + { "ca53-cpu0", 0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU, >>> + PD_CPU_NOCR }, >>> + { "ca53-cpu1", 0x200, 1, R8A77980_PD_CA53_CPU1, R8A77980_PD_CA53_SCU, >>> + PD_CPU_NOCR }, >>> + { "ca53-cpu2", 0x200, 2, R8A77980_PD_CA53_CPU2, R8A77980_PD_CA53_SCU, >>> + PD_CPU_NOCR }, >>> + { "ca53-cpu3", 0x200, 3, R8A77980_PD_CA53_CPU3, R8A77980_PD_CA53_SCU, >>> + PD_CPU_NOCR }, >>> + { "cr7", 0x240, 0, R8A77980_PD_CR7, R8A77980_PD_ALWAYS_ON }, >>> + { "a3ir", 0x180, 0, R8A77980_PD_A3IR, R8A77980_PD_ALWAYS_ON }, >>> + { "a2ir0", 0x400, 0, R8A77980_PD_A2IR0, R8A77980_PD_ALWAYS_ON }, >>> + { "a2ir1", 0x400, 1, R8A77980_PD_A2IR1, R8A77980_PD_A2IR0 }, >>> + { "a2ir2", 0x400, 2, R8A77980_PD_A2IR2, R8A77980_PD_A2IR0 }, >>> + { "a2ir3", 0x400, 3, R8A77980_PD_A2IR3, R8A77980_PD_A2IR0 }, >>> + { "a2ir4", 0x400, 4, R8A77980_PD_A2IR4, R8A77980_PD_A2IR0 }, >>> + { "a2ir5", 0x400, 5, R8A77980_PD_A2IR5, R8A77980_PD_A2IR0 }, >> >> Shouldn't all a2irN domains have a3ir as their parent? Finally found section 9.3 -- it seems you were right! :-) > Maybe.... I'd looked at the r8a77970-sysc.c and it also had A2IR0 as parent to all > other A2IR<n> clocks. That one has the parenting wrong (after comparing to the manual) -- I'll prepare a fix. >>> + { "a3vip", 0x2c0, 0, R8A77980_PD_A3VIP, R8A77980_PD_ALWAYS_ON }, >>> + { "a3vip1", 0x300, 0, R8A77980_PD_A3VIP1, R8A77980_PD_A3VIP }, >>> + { "a3vip2", 0x280, 0, R8A77980_PD_A3VIP2, R8A77980_PD_A3VIP }, >> >> With the above fixed: >> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Thank you -- will add... MBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Index: renesas/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt =================================================================== --- renesas.orig/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt +++ renesas/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt @@ -18,6 +18,7 @@ Required properties: - "renesas,r8a7795-sysc" (R-Car H3) - "renesas,r8a7796-sysc" (R-Car M3-W) - "renesas,r8a77970-sysc" (R-Car V3M) + - "renesas,r8a77980-sysc" (R-Car V3H) - "renesas,r8a77995-sysc" (R-Car D3) - reg: Address start and address range for the device. - #power-domain-cells: Must be 1. Index: renesas/drivers/soc/renesas/Kconfig =================================================================== --- renesas.orig/drivers/soc/renesas/Kconfig +++ renesas/drivers/soc/renesas/Kconfig @@ -15,6 +15,7 @@ config SOC_RENESAS select SYSC_R8A7795 if ARCH_R8A7795 select SYSC_R8A7796 if ARCH_R8A7796 select SYSC_R8A77970 if ARCH_R8A77970 + select SYSC_R8A77980 if ARCH_R8A77980 select SYSC_R8A77995 if ARCH_R8A77995 if SOC_RENESAS @@ -60,6 +61,10 @@ config SYSC_R8A77970 bool "R-Car V3M System Controller support" if COMPILE_TEST select SYSC_RCAR +config SYSC_R8A77980 + bool "R-Car V3H System Controller support" if COMPILE_TEST + select SYSC_RCAR + config SYSC_R8A77995 bool "R-Car D3 System Controller support" if COMPILE_TEST select SYSC_RCAR Index: renesas/drivers/soc/renesas/Makefile =================================================================== --- renesas.orig/drivers/soc/renesas/Makefile +++ renesas/drivers/soc/renesas/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_SYSC_R8A7794) += r8a7794-sy obj-$(CONFIG_SYSC_R8A7795) += r8a7795-sysc.o obj-$(CONFIG_SYSC_R8A7796) += r8a7796-sysc.o obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o +obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o # Family Index: renesas/drivers/soc/renesas/r8a77980-sysc.c =================================================================== --- /dev/null +++ renesas/drivers/soc/renesas/r8a77980-sysc.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas R-Car V3H System Controller + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + */ + +#include <linux/bug.h> +#include <linux/kernel.h> + +#include <dt-bindings/power/r8a77980-sysc.h> + +#include "rcar-sysc.h" + +static const struct rcar_sysc_area r8a77980_areas[] __initconst = { + { "always-on", 0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, + { "ca53-scu", 0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON, + PD_SCU }, + { "ca53-cpu0", 0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU, + PD_CPU_NOCR }, + { "ca53-cpu1", 0x200, 1, R8A77980_PD_CA53_CPU1, R8A77980_PD_CA53_SCU, + PD_CPU_NOCR }, + { "ca53-cpu2", 0x200, 2, R8A77980_PD_CA53_CPU2, R8A77980_PD_CA53_SCU, + PD_CPU_NOCR }, + { "ca53-cpu3", 0x200, 3, R8A77980_PD_CA53_CPU3, R8A77980_PD_CA53_SCU, + PD_CPU_NOCR }, + { "cr7", 0x240, 0, R8A77980_PD_CR7, R8A77980_PD_ALWAYS_ON }, + { "a3ir", 0x180, 0, R8A77980_PD_A3IR, R8A77980_PD_ALWAYS_ON }, + { "a2ir0", 0x400, 0, R8A77980_PD_A2IR0, R8A77980_PD_ALWAYS_ON }, + { "a2ir1", 0x400, 1, R8A77980_PD_A2IR1, R8A77980_PD_A2IR0 }, + { "a2ir2", 0x400, 2, R8A77980_PD_A2IR2, R8A77980_PD_A2IR0 }, + { "a2ir3", 0x400, 3, R8A77980_PD_A2IR3, R8A77980_PD_A2IR0 }, + { "a2ir4", 0x400, 4, R8A77980_PD_A2IR4, R8A77980_PD_A2IR0 }, + { "a2ir5", 0x400, 5, R8A77980_PD_A2IR5, R8A77980_PD_A2IR0 }, + { "a2sc0", 0x400, 6, R8A77980_PD_A2SC0, R8A77980_PD_ALWAYS_ON }, + { "a2sc1", 0x400, 7, R8A77980_PD_A2SC1, R8A77980_PD_A2SC0 }, + { "a2sc2", 0x400, 8, R8A77980_PD_A2SC2, R8A77980_PD_A2SC0 }, + { "a2sc3", 0x400, 9, R8A77980_PD_A2SC3, R8A77980_PD_A2SC0 }, + { "a2sc4", 0x400, 10, R8A77980_PD_A2SC4, R8A77980_PD_A2SC0 }, + { "a2pd0", 0x400, 11, R8A77980_PD_A2PD0, R8A77980_PD_ALWAYS_ON }, + { "a2pd1", 0x400, 12, R8A77980_PD_A2PD1, R8A77980_PD_A2PD0 }, + { "a2cn", 0x400, 13, R8A77980_PD_A2CN, R8A77980_PD_ALWAYS_ON }, + { "a3vip", 0x2c0, 0, R8A77980_PD_A3VIP, R8A77980_PD_ALWAYS_ON }, + { "a3vip1", 0x300, 0, R8A77980_PD_A3VIP1, R8A77980_PD_A3VIP }, + { "a3vip2", 0x280, 0, R8A77980_PD_A3VIP2, R8A77980_PD_A3VIP }, +}; + +const struct rcar_sysc_info r8a77980_sysc_info __initconst = { + .areas = r8a77980_areas, + .num_areas = ARRAY_SIZE(r8a77980_areas), +}; Index: renesas/drivers/soc/renesas/rcar-sysc.c =================================================================== --- renesas.orig/drivers/soc/renesas/rcar-sysc.c +++ renesas/drivers/soc/renesas/rcar-sysc.c @@ -287,6 +287,9 @@ static const struct of_device_id rcar_sy #ifdef CONFIG_SYSC_R8A77970 { .compatible = "renesas,r8a77970-sysc", .data = &r8a77970_sysc_info }, #endif +#ifdef CONFIG_SYSC_R8A77980 + { .compatible = "renesas,r8a77980-sysc", .data = &r8a77980_sysc_info }, +#endif #ifdef CONFIG_SYSC_R8A77995 { .compatible = "renesas,r8a77995-sysc", .data = &r8a77995_sysc_info }, #endif Index: renesas/drivers/soc/renesas/rcar-sysc.h =================================================================== --- renesas.orig/drivers/soc/renesas/rcar-sysc.h +++ renesas/drivers/soc/renesas/rcar-sysc.h @@ -59,6 +59,7 @@ extern const struct rcar_sysc_info r8a77 extern const struct rcar_sysc_info r8a7795_sysc_info; extern const struct rcar_sysc_info r8a7796_sysc_info; extern const struct rcar_sysc_info r8a77970_sysc_info; +extern const struct rcar_sysc_info r8a77980_sysc_info; extern const struct rcar_sysc_info r8a77995_sysc_info;