From patchwork Wed Jun 9 11:44:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1489824 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=MxwbXvLf; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4G0QLL22rhz9sVt for ; Wed, 9 Jun 2021 21:46:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239451AbhFILsZ (ORCPT ); Wed, 9 Jun 2021 07:48:25 -0400 Received: from mail-wr1-f46.google.com ([209.85.221.46]:37473 "EHLO mail-wr1-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239355AbhFILsQ (ORCPT ); Wed, 9 Jun 2021 07:48:16 -0400 Received: by mail-wr1-f46.google.com with SMTP id i94so20086985wri.4 for ; Wed, 09 Jun 2021 04:46:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=QgOUMBoD2zHHBI9ZOziOCGCk3PiF9PAVdOusqqA2H5c=; b=MxwbXvLfJeQeadiihQsxpj6gB1PQ5Eg//HJbzovHCbK8Y6jN6ip5aqY4t9UECx//q2 +GSTD1+dJMA7Qb9KKI41Ka1tfrZPrPMB973rW7LdPYddB5KryDnd6EN17WWzpZqAIPL2 nwimvXZooimkCCyrEBYxEqmWhhTPwKn5FVyhTmCU4CNvu2EgWw2AXuT+72t1FISYuFN/ OpFlEvDyeeeqNwIHYz2DwcumzDb8adYq88eO5ew5E8X7T5QNZ3ZUErOzRhrZStgSIPto orh1GQ/d04Kn3zJYh5jsQEarcIkcHlUcjUPFZ9/lq4enIOqzheA+9zfEq8FLPgBVdGHP Owgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=QgOUMBoD2zHHBI9ZOziOCGCk3PiF9PAVdOusqqA2H5c=; b=hiNkCvadrMVeAkmXbBR2xAsoaK/SVvXJCghK5UemYOmib+A2N1ORbG34huHWs72Eau X5cdIzrQvjKzjlzbqr4ky8Z7+Md1kfndLmBVokevYegddAoSfsUHpsnjVUv6YQDnETue r0ZcN4oI9OmIEm38AKHTFGaFCHc5qvCErvxw3aD1R795MOHBoE6P/nfdSmS1b8EP/hYW YGm0/pwur2TFv27WJ8KNURkbg9vNxFmDKau0H9JWNWxW//HwDsEEUjBmdxI9bTfnTNZ6 Mb13p9wAYP8d/YTfORJcu0mvsstkzw7WvESTgz6BxXONrI7wmuDY2gX1FRj2g3pnFPIy Nxiw== X-Gm-Message-State: AOAM533JcTf/B4RbWNgCnPpN4/C0Rj5Icdu9N7lJ60lef+oCm/022rjg VWa9Z/i++rBQOBW4Lb9c/AfZEfCMa7cXEibn X-Google-Smtp-Source: ABdhPJx2mxpQJsVKZeBKQmDWMjZMpTZPoyRgggkbBlMzDAJm0EbuveUBAeE4YPv80pNerWTmg7eAIw== X-Received: by 2002:a5d:5984:: with SMTP id n4mr13887948wri.294.1623239120594; Wed, 09 Jun 2021 04:45:20 -0700 (PDT) Received: from localhost ([2a02:768:2307:40d6::45a]) by smtp.gmail.com with ESMTPSA id f14sm4953696wri.16.2021.06.09.04.45.19 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 09 Jun 2021 04:45:19 -0700 (PDT) Sender: Michal Simek From: Michal Simek To: linux-kernel@vger.kernel.org, monstr@monstr.eu, michal.simek@xilinx.com, git@xilinx.com, Viresh Kumar Cc: Amit Kumar Mahapatra , Geert Uytterhoeven , Krzysztof Kozlowski , Laurent Pinchart , Michael Walle , Quanyang Wang , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 00/31] arm64: zynqmp: Extend board description Date: Wed, 9 Jun 2021 13:44:36 +0200 Message-Id: X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, over years couple of drivers were upstream and it is time to sync it up. On the top of it also adding new Kria boards which are using new overlay infrastructure which check if that overlays can be applied to base DT file. Thanks, Michal Amit Kumar Mahapatra (1): arm64: zynqmp: Do not duplicate flash partition label property Michal Simek (27): arm64: zynqmp: Disable CCI by default arm64: zynqmp: Enable fpd_dma for zcu104 platforms arm64: zynqmp: Fix irps5401 device nodes arm64: zynqmp: Add pinctrl description for all boards arm64: zynqmp: Correct zcu111 psgtr description arm64: zynqmp: Wire psgtr for zc1751-xm015 arm64: zynqmp: Correct psgtr description for zcu100-revC arm64: zynqmp: Add phy description for usb3.0 arm64: zynqmp: Disable WP on zcu111 arm64: zynqmp: Add missing mio-bank properties to dc1 and dc5 arm64: zynqmp: Wire DP and DPDMA for dc1/dc4 arm64: zynqmp: Enable nand driver for dc2 and dc3 arm64: zynqmp: Remove additional newline arm64: zynqmp: Move clock node to zynqmp-clk-ccf.dtsi arm64: zynqmp: Add nvmem alises for eeproms arm64: zynqmp: List reset property for ethernet phy arm64: zynqmp: Remove can aliases from zc1751 arm64: zynqmp: Move DP nodes to the end of file on zcu106 arm64: zynqmp: Add note about UHS mode on some boards arm64: zynqmp: Remove information about dma clock on zcu106 arm64: zynqmp: Wire qspi on multiple boards arm64: zynqmp: Move rtc to different location on zcu104-revA arm64: zynqmp: Add reset description for sata arm64: zynqmp: Sync psgtr node location with zcu104-revA arm64: zynqmp: Remove description for 8T49N287 and si5382 chips arm64: zynqmp: Add support for zcu102-rev1.1 board arm64: zynqmp: Add support for Xilinx Kria SOM board Mounika Grace Akula (1): arm64: zynqmp: Add reset-on-timeout to all boards and modify default timeout value Srinivas Neeli (1): arm64: zynqmp: Update rtc calibration value Stefano Stabellini (1): arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsi .../devicetree/bindings/arm/xilinx.yaml | 32 ++ arch/arm64/boot/dts/xilinx/Makefile | 12 + .../arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 13 +- .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dts | 371 ++++++++++++++++++ .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dts | 351 +++++++++++++++++ .../boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 289 ++++++++++++++ .../boot/dts/xilinx/zynqmp-smk-k26-revA.dts | 21 + .../boot/dts/xilinx/zynqmp-zc1232-revA.dts | 16 +- .../boot/dts/xilinx/zynqmp-zc1254-revA.dts | 16 +- .../dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 289 +++++++++++++- .../dts/xilinx/zynqmp-zc1751-xm016-dc2.dts | 335 +++++++++++++++- .../dts/xilinx/zynqmp-zc1751-xm017-dc3.dts | 9 +- .../dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 24 +- .../dts/xilinx/zynqmp-zc1751-xm019-dc5.dts | 330 +++++++++++++++- .../boot/dts/xilinx/zynqmp-zcu100-revC.dts | 254 +++++++++++- .../boot/dts/xilinx/zynqmp-zcu102-rev1.1.dts | 15 + .../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 315 ++++++++++++++- .../boot/dts/xilinx/zynqmp-zcu102-revB.dts | 3 +- .../boot/dts/xilinx/zynqmp-zcu104-revA.dts | 286 +++++++++++++- .../boot/dts/xilinx/zynqmp-zcu104-revC.dts | 244 +++++++++++- .../boot/dts/xilinx/zynqmp-zcu106-revA.dts | 335 +++++++++++++++- .../boot/dts/xilinx/zynqmp-zcu111-revA.dts | 269 ++++++++++++- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 29 +- 23 files changed, 3776 insertions(+), 82 deletions(-) create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dts create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dts create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.1.dts Reviewed-by: Laurent Pinchart