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Wed, 15 Nov 2023 14:08:41 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3AFE8eCl015943 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 15 Nov 2023 14:08:40 GMT Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Wed, 15 Nov 2023 06:08:37 -0800 From: Luo Jie To: , , , , , , , , , , CC: , , , Subject: [PATCH v3 0/6] add qca8084 ethernet phy driver Date: Wed, 15 Nov 2023 22:06:24 +0800 Message-ID: <20231115140630.10858-1-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.42.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: UqUp-tg-hTFh3LSAaVigv0iWjWbD2Z3o X-Proofpoint-ORIG-GUID: UqUp-tg-hTFh3LSAaVigv0iWjWbD2Z3o X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-15_12,2023-11-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 adultscore=0 mlxlogscore=776 impostorscore=0 spamscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1011 malwarescore=0 bulkscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2311150109 QCA8084 is four-port PHY with maximum link capability 2.5G, which supports the interface mode qusgmii and sgmii mode, there are two PCSs available to connected with ethernet port. QCA8084 can work in switch mode or PHY mode. For switch mode, both PCS0 and PCS1 work on sgmii mode. For PHY mode, PCS1 works on qusgmii mode, the last port (the fourth port) works on sgmii mode. Besides this PHY driver patches, the PCS driver is also needed to bring up the qca8084 device, which mainly configurs PCS and clocks. Changes in v3: 1. pick the two patches to introduce the interface mode 10g-qxgmii from Vladimir Oltean(olteanv@gmail.com). 2. add the function phydev_id_is_qca808x to identify the PHY qca8081 and qca8084. 3. update the interface mode name PHY_INTERFACE_MODE_QUSGMII to PHY_INTERFACE_MODE_10G_QXGMII. Luo Jie (4): net: phy: at803x: add QCA8084 ethernet phy support net: phy: at803x: add the function phydev_id_is_qca808x net: phy: at803x: Add qca8084_config_init function net: phy: qca8084: add qca8084_link_change_notify Vladimir Oltean (2): net: phylink: move phylink_pcs_neg_mode() to phylink.c net: phy: introduce core support for phy-mode = "10g-qxgmii" .../bindings/net/ethernet-controller.yaml | 1 + Documentation/networking/phy.rst | 6 + drivers/net/phy/at803x.c | 130 +++++++++++++++++- drivers/net/phy/phy-core.c | 1 + drivers/net/phy/phylink.c | 77 ++++++++++- include/linux/phy.h | 4 + include/linux/phylink.h | 67 +-------- 7 files changed, 212 insertions(+), 74 deletions(-) base-commit: bc962b35b139dd52319e6fc0f4bab00593bf38c9