| Message ID | 20231106-topic-sm8650-upstream-dt-v2-0-44d6f9710fa7@linaro.org |
|---|---|
| Headers | show |
| Series | arm64: dts: qcom: Introduce SM8650 platforms device tree | expand |
On 6.11.2023 09:39, Neil Armstrong wrote: > Add initial DTSI for the Qualcomm SM8650 platform, > only contains nodes which doesn't depend on interconnect. > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- Just a couple nits [...] > + cpu2-bottom-thermal { > + polling-delay-passive = <0>; > + polling-delay = <0>; > + thermal-sensors = <&tsens0 6>; > + > + trips { > + trip-point0 { > + temperature = <90000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + trip-point1 { > + temperature = <95000>; > + hysteresis = <2000>; > + type = "passive"; > + }; > + > + cpu-critical { indentation > + temperature = <110000>; > + hysteresis = <1000>; > + type = "critical"; > + }; > + }; > + }; [...] > + > + nsphmx-0-thermal { > + polling-delay-passive = <10>; > + polling-delay = <0>; > + thermal-sensors = <&tsens2 8>; > + > + trips { > + thermal-engine-config { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; > + > + thermal-hal-config { > + temperature = <125000>; > + hysteresis = <1000>; > + type = "passive"; > + }; The two above nodes (which are repeated under many tzones) sound made up just to be consumed by a bunch of android binaries Or at least the second one, maybe "thermal engine" is some hw/fw part? > + > + reset-mon-config { "reset mon" is not a very enticing name either.. > + temperature = <115000>; > + hysteresis = <5000>; > + type = "passive"; > + }; > + > + junction-config { ...which leads me to believe only this one is meaningful same goes for all tzones that have a similar mess :/ > + temperature = <95000>; > + hysteresis = <5000>; > + type = "passive"; > + }; Konrad
On 6.11.2023 09:39, Neil Armstrong wrote: > Now interconnect dependent devices are added in sm8650 DTSI, > now enable more devices for the Qualcomm SM8650 MTP board: > - PCIe > - Display > - DSPs > - SDCard > - UFS > - USB role switch with PMIC Glink > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- Little nits: [...] > &tlmm { > gpio-reserved-ranges = <32 8>; > + > + sde_dsi_active: sde-dsi-active-state { Dmitry voiced concerns about having the "SDE_" part here lately is it part of the actual pin name (in the schematic)? [...] > > &usb_1_dwc3 { > - dr_mode = "peripheral"; > + dr_mode = "otg"; Isn't that the default? Konrad
On 6.11.2023 09:39, Neil Armstrong wrote: > Now interconnect dependent devices are added in sm8650 DTSI, > now enable more devices for the Qualcomm SM8650 QRD board: > - PCIe > - Display > - DSPs > - SDCard > - UFS > - USB role switch with PMIC Glink > - Bluetooth > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- It's almost the same as p7 so the comments are the same too :) Konrad
On 18/11/2023 01:25, Konrad Dybcio wrote: > On 6.11.2023 09:39, Neil Armstrong wrote: >> Now interconnect dependent devices are added in sm8650 DTSI, >> now enable more devices for the Qualcomm SM8650 MTP board: >> - PCIe >> - Display >> - DSPs >> - SDCard >> - UFS >> - USB role switch with PMIC Glink >> >> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> >> --- > Little nits: > > [...] > >> &tlmm { >> gpio-reserved-ranges = <32 8>; >> + >> + sde_dsi_active: sde-dsi-active-state { > Dmitry voiced concerns about having the "SDE_" part here lately > is it part of the actual pin name (in the schematic)? Indeed, names and DISP0_RESET_N and MDP_VSYNC, will rename. > > [...] > >> >> &usb_1_dwc3 { >> - dr_mode = "peripheral"; >> + dr_mode = "otg"; > Isn't that the default? Without PMIC GLINK/UCSI, there's no mode switch source, so otg is not possible, and bootloader leaves the PMIC power state in peripheral mode. On the other side with the next patch, we add pmic-glink and we add "usb-role-switch" making it switchable. Neil > > Konrad
On 18/11/2023 01:21, Konrad Dybcio wrote: > On 6.11.2023 09:39, Neil Armstrong wrote: >> Add initial DTSI for the Qualcomm SM8650 platform, >> only contains nodes which doesn't depend on interconnect. >> >> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> >> --- > Just a couple nits > > [...] > >> + cpu2-bottom-thermal { >> + polling-delay-passive = <0>; >> + polling-delay = <0>; >> + thermal-sensors = <&tsens0 6>; >> + >> + trips { >> + trip-point0 { >> + temperature = <90000>; >> + hysteresis = <2000>; >> + type = "passive"; >> + }; >> + >> + trip-point1 { >> + temperature = <95000>; >> + hysteresis = <2000>; >> + type = "passive"; >> + }; >> + >> + cpu-critical { > indentation > >> + temperature = <110000>; >> + hysteresis = <1000>; >> + type = "critical"; >> + }; >> + }; >> + }; > [...] >> + >> + nsphmx-0-thermal { >> + polling-delay-passive = <10>; >> + polling-delay = <0>; >> + thermal-sensors = <&tsens2 8>; >> + >> + trips { >> + thermal-engine-config { >> + temperature = <125000>; >> + hysteresis = <1000>; >> + type = "passive"; >> + }; >> + >> + thermal-hal-config { >> + temperature = <125000>; >> + hysteresis = <1000>; >> + type = "passive"; >> + }; > The two above nodes (which are repeated under many tzones) sound made up > just to be consumed by a bunch of android binaries > > Or at least the second one, maybe "thermal engine" is some hw/fw part? > >> + >> + reset-mon-config { > "reset mon" is not a very enticing name either.. > >> + temperature = <115000>; >> + hysteresis = <5000>; >> + type = "passive"; >> + }; >> + >> + junction-config { > ...which leads me to believe only this one is meaningful > > same goes for all tzones that have a similar mess :/ >> + temperature = <95000>; >> + hysteresis = <5000>; >> + type = "passive"; >> + }; I already did a big cleanep, will clean even further! Thx, Neil > > Konrad
This introduces the Device Tree for the recently announced Snapdragon 8 Gen 3 from Qualcomm, you can find the marketing specifications at: https://docs.qualcomm.com/bundle/publicresource/87-71408-1_REV_B_Snapdragon_8_gen_3_Mobile_Platform_Product_Brief.pdf Bindings and base Device Tree for the SM8650 SoC, MTP (Mobile Test Platform) and QRD (Qualcommm Reference Device) are splited in two: - 1-5: boot-to-shell first set that are only build-dependent on Clock bindings - 6-8: multimedia second set that are build-dependent with Interconnect bindings Features added and enabled: - CPUs with CPUFREQ, SCPI idle states - QICv3, IOMMU, Timers - Interconnect NoCs with LLCC/CPU BWMONs - SoC 3xTemperature Sensors - Pinctrl/GPIO with PDC wakeup support - Global, GPU, Display, TCSR Clock Controllers - cDSP, aDSP and MPSS with SMP2P - QuP/I2C Master Hub I2C and SPI controllers + GPI DMA - PCIe 0/1 - USB2/USB3 with USB3/DP Combo PHY - UFS with Inline Crypto Engine - Crypto Engine + DMA and True Random Generator - SDHCI - Mobile Display Subsystem with 2xDSI output - PMIC Glink (USB-PD UCSI + Altmode) provided by aDSP firmware - GPIO and PMIC Buttons/LEDs on QRD board - WCN7850 Bluetooth - DSI + Touch panel Bindings Dependencies: - aoss-qmp: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-aoss-qmp-v1-1-8940621d704c@linaro.org/ - Reviewed - bwmon: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-bwmon-v1-1-11efcdd8799e@linaro.org/ - Reviewed - cpufreq: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-cpufreq-v1-1-31dec4887d14@linaro.org/ - Applied - dwc3: https://lore.kernel.org/all/20231030-topic-sm8650-upstream-bindings-dwc3-v2-1-60c0824fb835@linaro.org/ - Reviewed - gpi: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-gpi-v2-1-4de85293d730@linaro.org/ - Reviewed - ice: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-ice-v1-1-6b2bc14e71db@linaro.org/ - Reviewed - ipcc: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-ipcc-v1-1-acca4318d06e@linaro.org/ - Reviewed - pcie: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-pcie-v1-1-0e3d6f0c5827@linaro.org/ - Reviewed - pcd: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-pdc-v1-1-42f62cc9858c@linaro.org/ - Reviewed - pmic-glink: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-pmic-glink-v1-1-0c2829a62565@linaro.org/ - Reviewed - qce: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-qce-v1-1-7e30dba20dbf@linaro.org/ - Reviewed - rng: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-rng-v1-1-6b6a020e3441@linaro.org/ - Reviewed - scm: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-scm-v2-1-68a8db7ae434@linaro.org/ - Reviewed - sdhci: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-scm-v2-1-68a8db7ae434@linaro.org/ - Reviewed - smmu: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-smmu-v1-1-bfa25faa061e@linaro.org/ - Reviewed - tsens: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-bindings-tsens-v2-1-5add2ac04943@linaro.org/ - Reviewed - ufs: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-bindings-ufs-v3-1-a96364463fd5@linaro.org - Reviewed - clocks: https://lore.kernel.org/all/20231106-topic-sm8650-upstream-clocks-v3-0-761a6fadb4c0@linaro.org/ - interconnect: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-interconnect-v1-0-b7277e03aa3d@linaro.org/ - Reviewed - llcc: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-llcc-v2-0-f281cec608e2@linaro.org - Reviewed - mdss: https://lore.kernel.org/all/20231030-topic-sm8650-upstream-mdss-v2-0-43f1887c82b8@linaro.org/ - Reviewed - phy: https://lore.kernel.org/all/20231030-topic-sm8650-upstream-phy-v2-0-a543a4c4b491@linaro.org/ - Reviewed - remoteproc: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-remoteproc-v2-0-609ee572e0a2@linaro.org - Reviewed - rpmpd: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-rpmpd-v1-0-f25d313104c6@linaro.org/ - Applied - tlmm: https://lore.kernel.org/all/20231106-topic-sm8650-upstream-tlmm-v3-0-0e179c368933@linaro.org/ - Reviewed - goodix: https://lore.kernel.org/all/20231106-topic-goodix-berlin-upstream-initial-v11-0-5c47e9707c03@linaro.org/ - Reviewed Build Dependencies: - clocks: https://lore.kernel.org/all/20231106-topic-sm8650-upstream-clocks-v3-0-761a6fadb4c0@linaro.org/ - interconnect: https://lore.kernel.org/all/20231025-topic-sm8650-upstream-interconnect-v1-0-b7277e03aa3d@linaro.org/ - Reviewed Other: - socinfo: https://lore.kernel.org/all/20231030-topic-sm8650-upstream-socinfo-v2-0-4751e7391dc9@linaro.org/ - Reviewed Merge Strategy: - Merge patches 1-5 with Clock bindings immutable branch - Merge patches 6-8 with Interconnect immutable branch For convenience, a regularly refreshed linux-next based git tree containing all the SM8650 related work is available at: https://git.codelinaro.org/neil.armstrong/linux/-/tree/topic/sm8650/upstream/integ Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Changes in v2: - Drop RFC since most of bindings were reviewed - Collect Reviewed-by/Acked-bys - Remove #ifndef PMK8550VE_SID in favor of #define in sm8550 dts - Add allow-set-load/allowed-modes to LDOs - Add QCOM_ICC_TAG_ALWAYS/QCOM_ICC_TAG_ACTIVE_ONLY to interconnects = <> instead of 0 & 3 - minimal sm8650-qrd.dts cleanup - Link to v1: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-dt-v1-0-a821712af62f@linaro.org --- Neil Armstrong (8): dt-bindings: arm: qcom: document SM8650 and the reference boards arm64: dts: qcom: add initial SM8650 dtsi arm64: dts: qcom: pm8550ve: make PMK8550VE SID configurable arm64: dts: qcom: sm8650: add initial SM8650 MTP dts arm64: dts: qcom: sm8650: add initial SM8650 QRD dts arm64: dts: qcom: sm8650: add interconnect dependent device nodes arm64: dts: qcom: sm8650-mtp: add interconnect dependent device nodes arm64: dts: qcom: sm8650-qrd: add interconnect dependent device nodes Documentation/devicetree/bindings/arm/qcom.yaml | 7 + arch/arm64/boot/dts/qcom/Makefile | 2 + arch/arm64/boot/dts/qcom/pm8550ve.dtsi | 6 +- arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 1 + arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 1 + arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 678 +++ arch/arm64/boot/dts/qcom/sm8650-qrd.dts | 803 ++++ arch/arm64/boot/dts/qcom/sm8650.dtsi | 5610 +++++++++++++++++++++++ 8 files changed, 7105 insertions(+), 3 deletions(-) --- base-commit: fe1998aa935b44ef873193c0772c43bce74f17dc change-id: 20231016-topic-sm8650-upstream-dt-ee696999df62 Best regards,