| Message ID | 20231019060651.23341-1-praveen.teja.kundanala@amd.com |
|---|---|
| Headers | show |
| Series | Add ZynqMP efuse access support | expand |
On 19/10/2023 08:06, Praveen Teja Kundanala wrote: > Add nvmem DT nodes for ZynqMP SOC > > Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala@amd.com> > --- > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 59 +++++++++++++++++++++++++- > 1 file changed, 57 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > index b61fc99cd911..b7433e6b9d6c 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > @@ -194,14 +194,69 @@ zynqmp_power: zynqmp-power { > mbox-names = "tx", "rx"; > }; > > - nvmem_firmware { > + nvmem-firmware { Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification: https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > compatible = "xlnx,zynqmp-nvmem-fw"; It does not look like you tested the DTS against bindings. Please run `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). > #address-cells = <1>; > #size-cells = <1>; > > - soc_revision: soc_revision@0 { > + soc_revision: soc-revision@0 { > reg = <0x0 0x4>; > }; Wasn't this fixed already by Michal? Best regards, Krzysztof
[AMD Official Use Only - General] Hi Kozlowski, > -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Thursday, October 19, 2023 2:58 PM > To: Kundanala, Praveen Teja <praveen.teja.kundanala@amd.com>; > srinivas.kandagatla@linaro.org; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org; Simek, Michal > <michal.simek@amd.com>; Kundanala, Praveen Teja > <praveen.teja.kundanala@amd.com>; devicetree@vger.kernel.org; linux-arm- > kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Subject: Re: [PATCH V2 3/5] arm64: zynqmp: Add ZynqnMP nvmem nodes > > Caution: This message originated from an External Source. Use proper caution > when opening attachments, clicking links, or responding. > > > On 19/10/2023 08:06, Praveen Teja Kundanala wrote: > > Add nvmem DT nodes for ZynqMP SOC > > > > Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala@amd.com> > > --- > > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 59 > > +++++++++++++++++++++++++- > > 1 file changed, 57 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > index b61fc99cd911..b7433e6b9d6c 100644 > > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > @@ -194,14 +194,69 @@ zynqmp_power: zynqmp-power { > > mbox-names = "tx", "rx"; > > }; > > > > - nvmem_firmware { > > + nvmem-firmware { > > Node names should be generic. See also an explanation and list of examples > (not exhaustive) in DT specification: > https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree- > basics.html#generic-names-recommendation [Kundanala, Praveen Teja] Okay > > > > compatible = "xlnx,zynqmp-nvmem-fw"; > > It does not look like you tested the DTS against bindings. Please run `make > dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst > or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree- > sources-with-the-devicetree-schema/ > for instructions). [Kundanala, Praveen Teja] Missed it, Will run and send V3. > > > #address-cells = <1>; > > #size-cells = <1>; > > > > - soc_revision: soc_revision@0 { > > + soc_revision: soc-revision@0 { > > reg = <0x0 0x4>; > > }; > > Wasn't this fixed already by Michal? [Kundanala, Praveen Teja] Took base on Srinivas for-next repo and Michal's changes were not reflected in that repo. > > > Best regards, > Krzysztof
Hi, On 10/19/23 12:32, Kundanala, Praveen Teja wrote: > [AMD Official Use Only - General] > > Hi Kozlowski, > >> -----Original Message----- >> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> Sent: Thursday, October 19, 2023 2:58 PM >> To: Kundanala, Praveen Teja <praveen.teja.kundanala@amd.com>; >> srinivas.kandagatla@linaro.org; robh+dt@kernel.org; >> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org; Simek, Michal >> <michal.simek@amd.com>; Kundanala, Praveen Teja >> <praveen.teja.kundanala@amd.com>; devicetree@vger.kernel.org; linux-arm- >> kernel@lists.infradead.org >> Cc: linux-kernel@vger.kernel.org >> Subject: Re: [PATCH V2 3/5] arm64: zynqmp: Add ZynqnMP nvmem nodes >> >> Caution: This message originated from an External Source. Use proper caution >> when opening attachments, clicking links, or responding. >> >> >> On 19/10/2023 08:06, Praveen Teja Kundanala wrote: >>> Add nvmem DT nodes for ZynqMP SOC >>> >>> Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala@amd.com> >>> --- >>> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 59 >>> +++++++++++++++++++++++++- >>> 1 file changed, 57 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi >>> b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi >>> index b61fc99cd911..b7433e6b9d6c 100644 >>> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi >>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi >>> @@ -194,14 +194,69 @@ zynqmp_power: zynqmp-power { >>> mbox-names = "tx", "rx"; >>> }; >>> >>> - nvmem_firmware { >>> + nvmem-firmware { >> >> Node names should be generic. See also an explanation and list of examples >> (not exhaustive) in DT specification: >> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree- >> basics.html#generic-names-recommendation > [Kundanala, Praveen Teja] Okay >> >> >>> compatible = "xlnx,zynqmp-nvmem-fw"; >> >> It does not look like you tested the DTS against bindings. Please run `make >> dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst >> or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree- >> sources-with-the-devicetree-schema/ >> for instructions). > [Kundanala, Praveen Teja] Missed it, Will run and send V3. >> >>> #address-cells = <1>; >>> #size-cells = <1>; >>> >>> - soc_revision: soc_revision@0 { >>> + soc_revision: soc-revision@0 { >>> reg = <0x0 0x4>; >>> }; >> >> Wasn't this fixed already by Michal? > [Kundanala, Praveen Teja] Took base on Srinivas for-next repo and Michal's changes were not reflected in that repo. Feel free to drop this from series that it can go via nvmem tree directly. And when this is merged we can add just this patch via my tree. Thanks, Michal
Add following support - ZynqMP efuse firmware API for efuse access - Convert txt to yaml file - Add nodes for ZynqMP efuses in yaml file - Add device tree(DT) nodes for nvmem access - Update driver to provide support to read/write ZynqMP efuse memory - Add maintainer list for ZynqMP NVMEM driver Praveen Teja Kundanala (5): firmware: xilinx: Add ZynqMP efuse access API dt-bindings: nvmem: Convert xlnx,zynqmp-nvmem.txt to yaml arm64: zynqmp: Add ZynqnMP nvmem nodes nvmem: zynqmp_nvmem: Add support to access efuse MAINTAINERS: Add maintainers for ZynqMP NVMEM driver .../bindings/nvmem/xlnx,zynqmp-nvmem.txt | 46 ---- .../bindings/nvmem/xlnx,zynqmp-nvmem.yaml | 40 ++++ MAINTAINERS | 8 + arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 59 ++++- drivers/firmware/xilinx/zynqmp.c | 25 ++ drivers/nvmem/zynqmp_nvmem.c | 218 +++++++++++++++--- include/linux/firmware/xlnx-zynqmp.h | 8 + 7 files changed, 324 insertions(+), 80 deletions(-) delete mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.yaml