Message ID | 20230922-ixp4xx-gpio-clocks-v2-0-0215ee10976d@linaro.org |
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[92.34.216.5]) by smtp.gmail.com with ESMTPSA id w22-20020a05651c103600b002b9f4841913sm754329ljm.1.2023.09.21.23.07.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Sep 2023 23:07:59 -0700 (PDT) From: Linus Walleij <linus.walleij@linaro.org> Subject: [PATCH v2 0/2] gpio: ixp4xx: Handle external clock output Date: Fri, 22 Sep 2023 08:07:55 +0200 Message-Id: <20230922-ixp4xx-gpio-clocks-v2-0-0215ee10976d@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: <devicetree.vger.kernel.org> List-Subscribe: <mailto:devicetree+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:devicetree+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIADsvDWUC/32NQQqDMBBFryKz7hQdUzRdeY/iwqRJHComJEVSx Ls39QBdvgf//R2SiWwS3Ksdotk4sV8L0KUCPU+rM8jPwkA1tbWkBjkHkTO6wB714vUrYWd6ol5 aoVQLZRiisZzP6GMsPHN6+/g5P7bmZ//mtgZrvHVCClJWCjENC69T9FcfHYzHcXwBVz0M7LUAA AA= To: Linus Walleij <linusw@kernel.org>, Imre Kaloz <kaloz@openwrt.org>, Krzysztof Halasa <khalasa@piap.pl>, Bartosz Golaszewski <brgl@bgdev.pl>, Andy Shevchenko <andy@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij <linus.walleij@linaro.org>, Rob Herring <robh@kernel.org> X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net |
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gpio: ixp4xx: Handle external clock output
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The GPIO block on the very legacy IXP4xx GPIO can provide a generated clock output on GPIO 14 and GPIO 15. This provides a straight-forward solution with a flag for each clock output. More complicated solutions are thinkable, but I deemed them overdesigned for this legacy SoC. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- Changes in v2: - Fixed formatting pipe | in bindings - Fixed som blank lines in bindings - When we will just blank out the clock register settings, don't spend time reading the initial value. - Link to v1: https://lore.kernel.org/r/20230921-ixp4xx-gpio-clocks-v1-0-574942bf944a@linaro.org --- Linus Walleij (2): gpio: Rewrite IXP4xx GPIO bindings in schema gpio: ixp4xx: Handle clock output on pin 14 and 15 .../devicetree/bindings/gpio/intel,ixp4xx-gpio.txt | 38 ----------- .../bindings/gpio/intel,ixp4xx-gpio.yaml | 73 ++++++++++++++++++++++ MAINTAINERS | 2 +- drivers/gpio/gpio-ixp4xx.c | 40 +++++++++++- 4 files changed, 112 insertions(+), 41 deletions(-) --- base-commit: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d change-id: 20230921-ixp4xx-gpio-clocks-7e82289f4bb3 Best regards,