| Message ID | 20211006224659.21434-1-digetx@gmail.com |
|---|---|
| Headers | show |
| Series | tegra20-emc: Identify memory chip by LPDDR configuration | expand |
On Thu, 7 Oct 2021 01:46:50 +0300, Dmitry Osipenko wrote: > Support memory chip identification by LPDDR2 configuration, which is > needed by ASUS Transformer TF101 tablet device that doesn't store RAMCODE > in Tegra's NVMEM. > > Changelog: > > v5: - Added new patch which adds vendor prefix for Elpida Inc. > > [...] Applied, thanks! [1/9] dt-bindings: Relocate DDR bindings (no commit info) [2/9] dt-bindings: memory: lpddr2: Convert to schema commit: 8a3294b74ac621ab03ef88cb964c13089ffdf015 [3/9] dt-bindings: memory: lpddr2: Add revision-id properties commit: 3c1a1b4b191978559cae5c626da012ef897c1139 [4/9] dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F commit: 624f42157b99d253e6a52a7f93123eb0dbe1b26c [5/9] dt-bindings: Add vendor prefix for Elpida Memory commit: 8712faaf12106bc70fcaef2cb89f7958faddbe59 [7/9] dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node commit: ab4dd82cf5f8dd1943acf9243058262bc33c5af6 [8/9] memory: Add LPDDR2-info helpers commit: 5c767f684651e74f81c4d6a363e3779af3a77cc0 [9/9] memory: tegra20-emc: Support matching timings by LPDDR2 configuration commit: 4964b3e5c9ad4ad85b44f826a12c008af826545c (dts patch not applied) Best regards,
15.10.2021 10:20, Krzysztof Kozlowski пишет: > On Thu, 7 Oct 2021 01:46:50 +0300, Dmitry Osipenko wrote: >> Support memory chip identification by LPDDR2 configuration, which is >> needed by ASUS Transformer TF101 tablet device that doesn't store RAMCODE >> in Tegra's NVMEM. >> >> Changelog: >> >> v5: - Added new patch which adds vendor prefix for Elpida Inc. >> >> [...] > > Applied, thanks! > > [1/9] dt-bindings: Relocate DDR bindings > (no commit info) > [2/9] dt-bindings: memory: lpddr2: Convert to schema > commit: 8a3294b74ac621ab03ef88cb964c13089ffdf015 > [3/9] dt-bindings: memory: lpddr2: Add revision-id properties > commit: 3c1a1b4b191978559cae5c626da012ef897c1139 > [4/9] dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F > commit: 624f42157b99d253e6a52a7f93123eb0dbe1b26c > [5/9] dt-bindings: Add vendor prefix for Elpida Memory > commit: 8712faaf12106bc70fcaef2cb89f7958faddbe59 > [7/9] dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node > commit: ab4dd82cf5f8dd1943acf9243058262bc33c5af6 > [8/9] memory: Add LPDDR2-info helpers > commit: 5c767f684651e74f81c4d6a363e3779af3a77cc0 > [9/9] memory: tegra20-emc: Support matching timings by LPDDR2 configuration > commit: 4964b3e5c9ad4ad85b44f826a12c008af826545c > > > (dts patch not applied) I'll try to send that dts patch to OMAP people, thanks.
Support memory chip identification by LPDDR2 configuration, which is needed by ASUS Transformer TF101 tablet device that doesn't store RAMCODE in Tegra's NVMEM. Changelog: v5: - Added new patch which adds vendor prefix for Elpida Inc. - Added new patch that updates existing device-tree to use proper lowercase "elpida," compatible prefix. - Changed Krzysztof's email address in the LPDDR2 binding. - Added uint32 types to the LPDDR2 binding, which was requested by Krzysztof Kozlowski. v4: - Moved DDR bindings directory to memory-controllers/, like it was suggested by Krzysztof Kozlowski. - Converted existing LPDDR2 binding to schema and utilized it, like it was requested by Krzysztof Kozlowski. - Added Elpida B8132B2PB-6D-F compatible. - Made code changes that were requested by Krzysztof Kozlowski. v3: - Corrected sub-node name in tegra20-emc.yaml. v2: - Added separate binding for standard LPDDR2 properties, like it was suggested by Krzysztof Kozlowski. - Switched Tegra binding to use new lpddr2-configuration sub-node that contains the standard properties. - Extended commit message of the "emc: Document new LPDDR2 sub-node" patch, telling how the properties are supposed to be used, which was requested by Krzysztof Kozlowski. - Added new common helpers for parsing LPDDR2 properties and made tegra20-emc driver to use these helpers. Dmitry Osipenko (9): dt-bindings: Relocate DDR bindings dt-bindings: memory: lpddr2: Convert to schema dt-bindings: memory: lpddr2: Add revision-id properties dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F dt-bindings: Add vendor prefix for Elpida Memory ARM: dts: elpida_ecb240abacn: Change Elpida compatible dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node memory: Add LPDDR2-info helpers memory: tegra20-emc: Support matching timings by LPDDR2 configuration .../devicetree/bindings/ddr/lpddr2.txt | 102 -------- .../memory-controllers/ddr/jedec,lpddr2.yaml | 223 ++++++++++++++++++ .../ddr/lpddr2-timings.txt | 0 .../ddr/lpddr3-timings.txt | 0 .../{ => memory-controllers}/ddr/lpddr3.txt | 0 .../nvidia,tegra20-emc.yaml | 23 +- .../devicetree/bindings/vendor-prefixes.yaml | 2 + arch/arm/boot/dts/elpida_ecb240abacn.dtsi | 2 +- drivers/memory/jedec_ddr.h | 47 ++++ drivers/memory/jedec_ddr_data.c | 41 ++++ drivers/memory/of_memory.c | 87 +++++++ drivers/memory/of_memory.h | 9 + drivers/memory/tegra/Kconfig | 1 + drivers/memory/tegra/tegra20-emc.c | 199 ++++++++++++++-- 14 files changed, 617 insertions(+), 119 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ddr/lpddr2.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml rename Documentation/devicetree/bindings/{ => memory-controllers}/ddr/lpddr2-timings.txt (100%) rename Documentation/devicetree/bindings/{ => memory-controllers}/ddr/lpddr3-timings.txt (100%) rename Documentation/devicetree/bindings/{ => memory-controllers}/ddr/lpddr3.txt (100%)