Message ID | 20210806204446.2981299-1-mnhagan88@gmail.com |
---|---|
Headers | show |
Series | ARM: dts: NSP: add Meraki MX64/MX65 series | expand |
On Fri, 6 Aug 2021 21:44:32 +0100, Matthew Hagan <mnhagan88@gmail.com> wrote: > These bindings are required for all Meraki MX64/MX65 devices. These > common bindings include memory (2GB), PWM LEDs, AMAC, I2C (AT24), NAND > partitions, EHCI, OHCI and pinctrl. > > Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> > --- Applied to https://github.com/Broadcom/stblinux/commits/master, thanks! -- Florian
On Fri, 6 Aug 2021 21:44:33 +0100, Matthew Hagan <mnhagan88@gmail.com> wrote: > While uncommon, some Ax NSP SoCs exist in the wild. This stepping > requires a modified secondary CPU boot-reg and removal of DMA coherency > properties. Without these modifications, the secondary CPU will be > inactive and many peripherals will exhibit undefined behaviour. > > Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> > --- Applied to https://github.com/Broadcom/stblinux/commits/master, thanks! -- Florian
On Fri, 6 Aug 2021 21:44:34 +0100, Matthew Hagan <mnhagan88@gmail.com> wrote: > MX64 & MX64W Hardware info: > - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz > - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR) > - Storage: 1 GB (Micron MT29F8G08ABACA) > - Networking: BCM58625 internal switch (5x 1GbE ports) > - USB: 1x USB2.0 > - Serial: Internal header > - WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus > > This patch adds the Meraki MX64 series-specific bindings. Since some > devices make use of the older A0 SoC, changes need to be made to > accommodate this case, including removal of coherency options and > modification to the secondary-boot-reg. > > Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> > --- Applied to https://github.com/Broadcom/stblinux/commits/master, thanks! -- Florian
On Fri, 6 Aug 2021 21:44:35 +0100, Matthew Hagan <mnhagan88@gmail.com> wrote: > MX65 & MX65W Hardware info: > - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz > - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR) > - Storage: 1 GB (Micron MT29F8G08ABACA) > - Networking: BCM58625 switch (2x 1GbE ports) > 2x Qualcomm QCA8337 switches (10x 1GbE ports total) > - PSE: Broadcom BCM59111KMLG connected to LAN ports 11 & 12 > - USB: 1x USB2.0 > - Serial: Internal header > - WLAN(MX65W Only): 2x Broadcom BCM43520KMLG on the PCI bus. > > Note that a driver and firmware image for the BCM59111 PSE has been > released under GPL, but this is not present in the kernel. > > Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> > --- Applied to https://github.com/Broadcom/stblinux/commits/master, thanks! -- Florian
On 8/6/2021 10:44 PM, Matthew Hagan wrote: > Changes from v2: > - Introduce boards to Makefile in same patch as the board dts is added > (Vladimir Oltean) > - Use alphabetical ordering for labels (Vladimir Oltean) > - Remove address-cells and size-cells in qca8337 switch nodes (Vladimir > Oltean) > - Remove "cpu" labels from switch nodes' CPU ports (Vladimir Oltean) > - Various LED fixes, utilising dt-bindings/leds/common.h and correctly > specifying LEDs in the form "led-N" and with the color/function/ > function-enumerator properties. > - Fix PWM LEDs and corresponding pinctrl bindings. (Vladimir Oltean) > > The following changes were submitted as a separate series: > - Introduce patches to disable QSPI by default and enable where used > (Vladimir Oltean) > - Move mdio@18032000 node from board related file to SoC (Vladimir > Oltean) > - In addition to above, relocate mdio-mux to bcm-nsp.dtsi and fix > the resulting usb3_phy issues > > Changes from v3: > - Sort labels on mx64 a0 dts files into alphabetical order as well > - move include directives for input/input.h and leds/common.h to > bcm958625-mx6x-common.dtsi > - Whitespace fixes in bcm958625-mx6x-common.dtsi > - rename "senao_nvram" partition to "nvram" > > Changes from v4: > - Move chosen and memory nodes from bcm958625-mx6x-common.dtsi to > each .dts file (Arnd Bergmann). > - Append [@<unit-address>] to memory nodes. > - Create Ax stepping-specific dtsi for Ax devices (Arnd Bergmann). > - Append read-only property to at24 eeprom node. > - Remove L2 properties which should be defined at platform-level. > - Correct NAND node names. I applied patch 1 first such that we don't get warnings when we apply patches from there on during bisection builds.