From patchwork Mon Nov 16 17:11:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 1401059 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CZbHB4WZ3z9sPB for ; Tue, 17 Nov 2020 04:12:38 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732443AbgKPRMR (ORCPT ); Mon, 16 Nov 2020 12:12:17 -0500 Received: from relay8-d.mail.gandi.net ([217.70.183.201]:52991 "EHLO relay8-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731108AbgKPRMR (ORCPT ); Mon, 16 Nov 2020 12:12:17 -0500 X-Originating-IP: 91.175.115.186 Received: from localhost (91-175-115-186.subs.proxad.net [91.175.115.186]) (Authenticated sender: gregory.clement@bootlin.com) by relay8-d.mail.gandi.net (Postfix) with ESMTPSA id 3564E1BF227; Mon, 16 Nov 2020 17:12:14 +0000 (UTC) From: Gregory CLEMENT To: Sebastian Reichel , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Thomas Petazzoni , Alexandre Belloni , Lars Povlsen , , Gregory CLEMENT Subject: [PATCH 0/5] Improve reset for ocelot and add support for new platfrom Date: Mon, 16 Nov 2020 18:11:54 +0100 Message-Id: <20201116171159.1735315-1-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This series first adds new feature to the ocelot reset driver and then it extends its support for 2 other MIPS based SoCs: Luton and Jaguar 2. Patches 1, 2 and 4 should be merged through the reset subsystem, while the device tree changes in patches 3 and 5 should go through the mips subsystem. Gregory Gregory CLEMENT (3): MIPS: dts: mscc: add reset switch property power: reset: ocelot: Add support 2 othe MIPS based SoCs MIPS: dts: mscc: add reset support for Luton and Jaguar2 Lars Povlsen (2): dt-bindings: reset: ocelot: Add documentation for 'microchip,reset-switch-core' property power: reset: ocelot: Add support for reset switch on load time .../bindings/power/reset/ocelot-reset.txt | 6 ++ arch/mips/boot/dts/mscc/jaguar2.dtsi | 6 ++ arch/mips/boot/dts/mscc/luton.dtsi | 5 ++ arch/mips/boot/dts/mscc/ocelot.dtsi | 1 + drivers/power/reset/ocelot-reset.c | 70 +++++++++++++++++-- 5 files changed, 83 insertions(+), 5 deletions(-) Acked-by: Alexandre Belloni