| Message ID | 20200930031712.2365-1-thunder.leizhen@huawei.com |
|---|---|
| Headers | show |
| Series | add support for Hisilicon SD5203 SoC | expand |
On Wed, Sep 30, 2020 at 11:17:03AM +0800, Zhen Lei wrote: > From: Kefeng Wang <wangkefeng.wang@huawei.com> > > Add sd5203.dts for Hisilicon SD5203 SoC platform. > > Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> > Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> > --- > arch/arm/boot/dts/Makefile | 2 + > arch/arm/boot/dts/sd5203.dts | 96 ++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 98 insertions(+) > create mode 100644 arch/arm/boot/dts/sd5203.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 4572db3fa5ae302..1d1262df5c55907 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -357,6 +357,8 @@ dtb-$(CONFIG_ARCH_MPS2) += \ > mps2-an399.dtb > dtb-$(CONFIG_ARCH_MOXART) += \ > moxart-uc7112lx.dtb > +dtb-$(CONFIG_ARCH_SD5203) += \ > + sd5203.dtb > dtb-$(CONFIG_SOC_IMX1) += \ > imx1-ads.dtb \ > imx1-apf9328.dtb > diff --git a/arch/arm/boot/dts/sd5203.dts b/arch/arm/boot/dts/sd5203.dts > new file mode 100644 > index 000000000000000..3cc9a23910be62e > --- /dev/null > +++ b/arch/arm/boot/dts/sd5203.dts > @@ -0,0 +1,96 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (c) 2020 Hisilicon Limited. > + * > + * DTS file for Hisilicon SD5203 Board > + */ > + > +/dts-v1/; > + > +/ { > + model = "Hisilicon SD5203"; > + compatible = "H836ASDJ", "hisilicon,sd5203"; > + interrupt-parent = <&vic>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + chosen { > + bootargs="console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000"; > + }; > + > + aliases { > + serial0 = &uart0; > + }; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu0 { > + device_type = "cpu"; > + compatible = "arm,arm926ej-s"; > + reg = <0x0>; > + }; > + }; > + > + memory@30000000 { > + device_type = "memory"; > + reg = <0x30000000 0x8000000>; > + }; > + > + soc { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "simple-bus"; > + ranges; > + > + vic: interrupt-controller@10130000 { > + compatible = "snps,dw-apb-ictl"; > + reg = <0x10130000 0x1000>; > + interrupt-controller; > + #interrupt-cells = <1>; > + }; > + > + refclk125mhz: refclk125mhz { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <125000000>; Is this a reference clock really in the SoC? Not outside, e.g. property of the board? Best regards, Krzysztof
v5 --> v6: 1. Add a new property "#reset-cells" and update the example in Patch 15. All other patches are not changed. v4 --> v5: 1. Drop the descriptions of the common properties, such as "reg". 2. Add "additionalProperties: false" or "additionalProperties: type: object" for each new yaml file. 3. Group three Hi6220 domain controller into one yaml file, see Patch 15 4. Remove the prefix "hisilicon," of each yaml file, all of them are under hisilicon directory, no need to duplicated it. 5. move four controllers into syscon.yaml, because they have no specific properties, see Patch 1-2. 6. Add the name of the board which based on sd5203, see Patch 5 and 8. 7. Add Patch 9, all controller should contain "syscon" compatible string. 8. Add property "ranges" and update the example, see Patch 16. 9. Romove the labels in all examples. 10. other trival fixes are not mentioned. Please review Patch 1-9 first, other patches are not urgent and each of them is independent. v3 --> v4: 1. remove unexpected "\ No newline at end of file" of each new file. 2. discard the subdirectory "hi3620" and "hipxx", all files in the two directories are moved to the parent directory. 3. add two spaces for the below cases: - items: - const: hisilicon,sysctrl. //add two spaces 4. only list the compatible of boards in hisilicon.yaml, that is: 1) a compatible of one board 2) a compatible of one board + a compatible of one SoC 5. other trival fixes are not mentioned. v2 --> v3: 1. Convert hisilicon.txt to hisilicon.yaml. Because there are many kinds of Hisilicon controllers in it, so split each of them into a separate file first. Then I convert all of them to DT schema format, and also convert the other files in directory "../bindings/arm/hisilicon/". 2. Add Patch 1: remove a unused compatible name in hip01-ca9x2.dts This error is detected by hisilicon.yaml. The merge window of 5.10 is narrow now, so please review Patch 1-7 first. v1 --> v2: 1. add binding for SD5203 SoC, Patch 1 2. select DW_APB_ICTL instead of HISILICON_SD5203_VIC in Patch 2. Meanwhile, change the compatible of interrupt-controller to "snps,dw-apb-ictl" in Patch 4. 3. Fix the errors detected by dtbs_check. For example: add "reg" for cpu node, use lowercase a-f to describe address, add "baudclk" for "snps,dw-apb-uart". v1: Add SD5203 SoC config option and devicetree file, also enable its debug UART. Kefeng Wang (3): ARM: hisi: add support for SD5203 SoC ARM: debug: add UART early console support for SD5203 ARM: dts: add SD5203 dts Zhen Lei (14): dt-bindings: mfd: syscon: add some compatible strings for Hisilicon dt-bindings: arm: hisilicon: delete the descriptions of HiP05/HiP06 controllers dt-bindings: arm: hisilicon: split the dt-bindings of each controller into a separate file dt-bindings: arm: hisilicon: convert Hisilicon board/soc bindings to json-schema dt-bindings: arm: hisilicon: add binding for SD5203 SoC ARM: dts: hisilicon: fix ststem controller compatible node dt-bindings: arm: hisilicon: convert system controller bindings to json-schema dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl bindings to json-schema dt-bindings: arm: hisilicon: convert hisilicon,pctrl bindings to json-schema dt-bindings: arm: hisilicon: convert hisilicon,hip04-fabric bindings to json-schema dt-bindings: arm: hisilicon: convert hisilicon,hip04-bootwrapper bindings to json-schema dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema dt-bindings: arm: hisilicon: convert hisilicon,hi3798cv200-perictrl bindings to json-schema dt-bindings: arm: hisilicon: convert LPC controller bindings to json-schema .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 29 ++ .../hisilicon/controller/hi3798cv200-perictrl.yaml | 64 +++++ .../hisilicon/controller/hi6220-domain-ctrl.yaml | 68 +++++ .../hisilicon/controller/hip04-bootwrapper.yaml | 34 +++ .../arm/hisilicon/controller/hip04-fabric.yaml | 27 ++ .../bindings/arm/hisilicon/controller/pctrl.yaml | 34 +++ .../bindings/arm/hisilicon/controller/sysctrl.yaml | 110 +++++++ .../bindings/arm/hisilicon/hi3519-sysctrl.txt | 14 - .../arm/hisilicon/hisilicon-low-pin-count.txt | 33 --- .../bindings/arm/hisilicon/hisilicon.txt | 319 --------------------- .../bindings/arm/hisilicon/hisilicon.yaml | 67 +++++ .../bindings/arm/hisilicon/low-pin-count.yaml | 61 ++++ Documentation/devicetree/bindings/mfd/syscon.yaml | 5 +- arch/arm/Kconfig.debug | 11 +- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/hi3620.dtsi | 2 +- arch/arm/boot/dts/hip04.dtsi | 2 +- arch/arm/boot/dts/sd5203.dts | 96 +++++++ arch/arm/mach-hisi/Kconfig | 16 +- 19 files changed, 622 insertions(+), 372 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml create mode 100644 arch/arm/boot/dts/sd5203.dts