Message ID | 20200521005321.12129-1-Sergey.Semin@baikalelectronics.ru |
---|---|
Headers | show |
Series | clocksource: Fix MIPS GIC and DW APB Timer for Baikal-T1 SoC support | expand |
Hi Serge, On Thu, May 21, 2020 at 2:54 AM Serge Semin <Sergey.Semin@baikalelectronics.ru> wrote: > Currently clocksource framework doesn't support the clocks with variable > frequency. Since MIPS GIC timer ticks rate might be unstable on some > platforms, we must make sure that it justifies the clocksource > requirements. MIPS GIC timer is incremented with the CPU cluster reference > clocks rate. So in case if CPU frequency changes, the MIPS GIC tick rate > changes synchronously. Due to this the clocksource subsystem can't rely on > the timer to measure system clocks anymore. This commit marks the MIPS GIC > based clocksource as unstable if reference clock (normally it's a CPU > reference clocks) rate changes. The clocksource will execute a watchdog > thread, which lowers the MIPS GIC timer rating to zero and fallbacks to a > new stable one. > > Note we don't need to set the CLOCK_SOURCE_MUST_VERIFY flag to the MIPS > GIC clocksource since normally the timer is stable. The only reason why > it gets unstable is due to the ref clock rate change, which event we > detect here in the driver by means of the clocks event notifier. > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Thanks for your patch! > --- a/drivers/clocksource/mips-gic-timer.c > +++ b/drivers/clocksource/mips-gic-timer.c > @@ -24,6 +24,9 @@ > static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device); > static int gic_timer_irq; > static unsigned int gic_frequency; > +static bool __read_mostly gic_clock_unstable; > + > +static void git_clocksource_unstable(char *reason); gic_clocksource_unstable? (everywhere) Gr{oetje,eeting}s, Geert
On Thu, May 21, 2020 at 11:09:50AM +0200, Geert Uytterhoeven wrote: > Hi Serge, > > On Thu, May 21, 2020 at 2:54 AM Serge Semin > <Sergey.Semin@baikalelectronics.ru> wrote: > > Currently clocksource framework doesn't support the clocks with variable > > frequency. Since MIPS GIC timer ticks rate might be unstable on some > > platforms, we must make sure that it justifies the clocksource > > requirements. MIPS GIC timer is incremented with the CPU cluster reference > > clocks rate. So in case if CPU frequency changes, the MIPS GIC tick rate > > changes synchronously. Due to this the clocksource subsystem can't rely on > > the timer to measure system clocks anymore. This commit marks the MIPS GIC > > based clocksource as unstable if reference clock (normally it's a CPU > > reference clocks) rate changes. The clocksource will execute a watchdog > > thread, which lowers the MIPS GIC timer rating to zero and fallbacks to a > > new stable one. > > > > Note we don't need to set the CLOCK_SOURCE_MUST_VERIFY flag to the MIPS > > GIC clocksource since normally the timer is stable. The only reason why > > it gets unstable is due to the ref clock rate change, which event we > > detect here in the driver by means of the clocks event notifier. > > > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > Thanks for your patch! > > > --- a/drivers/clocksource/mips-gic-timer.c > > +++ b/drivers/clocksource/mips-gic-timer.c > > @@ -24,6 +24,9 @@ > > static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device); > > static int gic_timer_irq; > > static unsigned int gic_frequency; > > +static bool __read_mostly gic_clock_unstable; > > + > > +static void git_clocksource_unstable(char *reason); > > gic_clocksource_unstable? (everywhere) This is the most used word lately. So my hands write git everywhere by itself.) Thanks for noticing this. -Sergey > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
As for all Baikal-T1 SoC related patchsets, which need this, we replaced the DW APB Timer legacy plain text-based dt-binding file with DT schema. Similarly the MIPS GIC bindings file is also converted to DT schema seeing it also defines the MIPS GIC Timer binding. Aside from MIPS-specific r4k timer Baikal-T1 chip also provides a functionality of two another timers: embedded into the MIPS GIC timer and three external DW timers available over APB bus. But we can't use them before the corresponding drivers are properly fixed. First of all DW APB Timer shouldn't be bound to a single CPU, since as being accessible over APB they are external with respect to all possible CPUs. Secondly there might be more than just two DW APB Timers in the system (Baikal-T1 has three of them), so permit the driver to use one of them as a clocksource and the rest - for clockevents. Thirdly it's possible to use MIPS GIC timer as a clocksource so register it in the corresponding subsystem (the patch has been found in the Paul Burton MIPS repo so I left the original Signed-off-by attribute). Finally in the same way as r4k timer the MIPS GIC timer should be used with care when CPUFREQ config is enabled since in case of CM2 the timer counting depends on the CPU reference clock frequency while the clocksource subsystem currently doesn't support the timers with non-stable clock. This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4: base-commit: 0e698dfa2822 ("Linux 5.7-rc4") tag: v5.7-rc4 Changelog v2: - Fix the SoB tags. - Our corporate email server doesn't change Message-Id anymore, so the patchset is resubmitted being in the cover-letter-threaded format. - Convert the "snps,dw-apb-timer" binding to DT schema in a dedicated patch. - Convert the "mti,gic" binding to DT schema in a dedicated patch. Link: https://lore.kernel.org/linux-rtc/20200324174325.14213-1-Sergey.Semin@baikalelectronics.ru Changelog v3: - Make the MIPS GIC timer sub-node name not having a unit-address number. - Discard allOf: [ $ref: /schemas/interrupt-controller.yaml# ] from MIPS GIC bindings. - Add patch moving the "snps,dw-apb-timer" binding file to the directory with timers binding files. Link: https://lore.kernel.org/linux-rtc/20200506214107.25956-1-Sergey.Semin@baikalelectronics.ru Changelog v4: - Mark clocksource as unstable instead of lowering its rating. - Move conditional sched clocks registration to the Paul' patch. - Add Thomas Gleixner to the patchset To-list to draw his attention to the patch "dt-bindings: interrupt-controller: Convert mti,gic to DT schema". Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru> Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru> Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru> Cc: Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru> Cc: Vadim Vlasov <V.Vlasov@baikalelectronics.ru> Cc: Alexey Kolotnikov <Alexey.Kolotnikov@baikalelectronics.ru> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-rtc@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Paul Burton (1): clocksource: mips-gic-timer: Register as sched_clock Serge Semin (6): dt-bindings: rtc: Convert snps,dw-apb-timer to DT schema dt-bindings: timer: Move snps,dw-apb-timer DT schema from rtc dt-bindings: interrupt-controller: Convert mti,gic to DT schema clocksource: dw_apb_timer: Set clockevent any-possible-CPU mask clocksource: dw_apb_timer_of: Fix missing clockevent timers clocksource: mips-gic-timer: Mark GIC timer as unstable if ref clock changes .../interrupt-controller/mips-gic.txt | 67 -------- .../interrupt-controller/mti,gic.yaml | 148 ++++++++++++++++++ .../devicetree/bindings/rtc/dw-apb.txt | 32 ---- .../bindings/timer/snps,dw-apb-timer.yaml | 88 +++++++++++ drivers/clocksource/Kconfig | 1 + drivers/clocksource/dw_apb_timer.c | 18 +-- drivers/clocksource/dw_apb_timer_of.c | 9 +- drivers/clocksource/mips-gic-timer.c | 50 +++++- include/linux/dw_apb_timer.h | 2 +- 9 files changed, 293 insertions(+), 122 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml delete mode 100644 Documentation/devicetree/bindings/rtc/dw-apb.txt create mode 100644 Documentation/devicetree/bindings/timer/snps,dw-apb-timer.yaml