mbox series

[V4,0/5] Add support for PCIe endpoint mode in Tegra194

Message ID 20200303105418.2840-1-vidyas@nvidia.com
Headers show
Series Add support for PCIe endpoint mode in Tegra194 | expand

Message

Vidya Sagar March 3, 2020, 10:54 a.m. UTC
Tegra194 has three (C0, C4 & C5) dual mode PCIe controllers that can operate
either in root port mode or in end point mode but only in one mode at a time.
Platform P2972-0000 supports enabling endpoint mode for C5 controller. This
patch series adds support for PCIe endpoint mode in both the driver as well as
in DT.
This patch series depends on the changes made for Synopsys DesignWare endpoint
mode subsystem that are recently accepted.
@ https://patchwork.kernel.org/project/linux-pci/list/?series=202211
which in turn depends on the patch made by Kishon
@ https://patchwork.kernel.org/patch/10975123/
which is also under review.

V4:
* Started using threaded irqs instead of kthreads

V3:
* Re-ordered patches in the series to make the driver change as the last patch
* Took care of Thierry's review comments

V2:
* Addressed Thierry & Bjorn's review comments
* Added EP mode specific binding documentation to already existing binding documentation file
* Removed patch that enables GPIO controller nodes explicitly as they are enabled already

Vidya Sagar (5):
  soc/tegra: bpmp: Update ABI header
  dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194
  arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
  arm64: tegra: Add support for PCIe endpoint mode in P2972-0000
    platform
  PCI: tegra: Add support for PCIe endpoint mode in Tegra194

 .../bindings/pci/nvidia,tegra194-pcie.txt     | 125 +++-
 .../boot/dts/nvidia/tegra194-p2972-0000.dts   |  18 +
 arch/arm64/boot/dts/nvidia/tegra194.dtsi      |  99 +++
 drivers/pci/controller/dwc/Kconfig            |  30 +-
 drivers/pci/controller/dwc/pcie-tegra194.c    | 681 +++++++++++++++++-
 include/soc/tegra/bpmp-abi.h                  |  10 +-
 6 files changed, 918 insertions(+), 45 deletions(-)

Comments

Thierry Reding March 3, 2020, 1:38 p.m. UTC | #1
On Tue, Mar 03, 2020 at 04:24:18PM +0530, Vidya Sagar wrote:
> Add support for the endpoint mode of Synopsys DesignWare core based
> dual mode PCIe controllers present in Tegra194 SoC.
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> V4:
> * Addressed Lorenzo's review comments
> * Started using threaded irqs instead of kthreads
> 
> V3:
> * Addressed Thierry's review comments
> 
> V2:
> * Addressed Bjorn's review comments
> * Made changes as part of addressing review comments for other patches
> 
>  drivers/pci/controller/dwc/Kconfig         |  30 +-
>  drivers/pci/controller/dwc/pcie-tegra194.c | 681 ++++++++++++++++++++-
>  2 files changed, 693 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> index 0830dfcfa43a..169cde58dd92 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -248,14 +248,38 @@ config PCI_MESON
>  	  implement the driver.
>  
>  config PCIE_TEGRA194
> -	tristate "NVIDIA Tegra194 (and later) PCIe controller"
> +	tristate
> +
> +config PCIE_TEGRA194_HOST
> +	tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
>  	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
>  	depends on PCI_MSI_IRQ_DOMAIN
>  	select PCIE_DW_HOST
>  	select PHY_TEGRA194_P2U
> +	select PCIE_TEGRA194
> +	default y
> +	help
> +	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
> +	  work in host mode. There are two instances of PCIe controllers in
> +	  Tegra194. This controller can work either as EP or RC. In order to
> +	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
> +	  in order to enable device-specific features PCIE_TEGRA194_EP must be
> +	  selected. This uses the DesignWare core.
> +
> +config PCIE_TEGRA194_EP
> +	tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode"
> +	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
> +	depends on PCI_ENDPOINT
> +	select PCIE_DW_EP
> +	select PHY_TEGRA194_P2U
> +	select PCIE_TEGRA194
>  	help
> -	  Say Y here if you want support for DesignWare core based PCIe host
> -	  controller found in NVIDIA Tegra194 SoC.
> +	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
> +	  work in host mode. There are two instances of PCIe controllers in
> +	  Tegra194. This controller can work either as EP or RC. In order to
> +	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
> +	  in order to enable device-specific features PCIE_TEGRA194_EP must be
> +	  selected. This uses the DesignWare core.
>  
>  config PCIE_UNIPHIER
>  	bool "Socionext UniPhier PCIe controllers"
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index cbe95f0ea0ca..81810e644b23 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -14,6 +14,8 @@
>  #include <linux/interrupt.h>
>  #include <linux/iopoll.h>
>  #include <linux/kernel.h>
> +#include <linux/kfifo.h>
> +#include <linux/kthread.h>

After moving to threaded IRQs, do you still need these includes?

Acked-by: Thierry Reding <treding@nvidia.com>
Thierry Reding March 3, 2020, 1:40 p.m. UTC | #2
On Tue, Mar 03, 2020 at 04:24:13PM +0530, Vidya Sagar wrote:
> Tegra194 has three (C0, C4 & C5) dual mode PCIe controllers that can operate
> either in root port mode or in end point mode but only in one mode at a time.
> Platform P2972-0000 supports enabling endpoint mode for C5 controller. This
> patch series adds support for PCIe endpoint mode in both the driver as well as
> in DT.
> This patch series depends on the changes made for Synopsys DesignWare endpoint
> mode subsystem that are recently accepted.
> @ https://patchwork.kernel.org/project/linux-pci/list/?series=202211
> which in turn depends on the patch made by Kishon
> @ https://patchwork.kernel.org/patch/10975123/
> which is also under review.
> 
> V4:
> * Started using threaded irqs instead of kthreads
> 
> V3:
> * Re-ordered patches in the series to make the driver change as the last patch
> * Took care of Thierry's review comments
> 
> V2:
> * Addressed Thierry & Bjorn's review comments
> * Added EP mode specific binding documentation to already existing binding documentation file
> * Removed patch that enables GPIO controller nodes explicitly as they are enabled already
> 
> Vidya Sagar (5):
>   soc/tegra: bpmp: Update ABI header
>   dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194
>   arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
>   arm64: tegra: Add support for PCIe endpoint mode in P2972-0000
>     platform
>   PCI: tegra: Add support for PCIe endpoint mode in Tegra194

Hi Lorenzo,

I've acked patches 1, 2 and 5 of the series. I think you're going to
need to apply patch 1 in order to satisfy a build-time dependency from
patch 5. I can apply patches 3 and 4 to the Tegra tree since they're
only adding device tree content that may conflict with some other
patches that I have in the Tegra tree.

Does that sound reasonable?

Thierry
Lorenzo Pieralisi March 3, 2020, 3:02 p.m. UTC | #3
On Tue, Mar 03, 2020 at 02:40:53PM +0100, Thierry Reding wrote:
> On Tue, Mar 03, 2020 at 04:24:13PM +0530, Vidya Sagar wrote:
> > Tegra194 has three (C0, C4 & C5) dual mode PCIe controllers that can operate
> > either in root port mode or in end point mode but only in one mode at a time.
> > Platform P2972-0000 supports enabling endpoint mode for C5 controller. This
> > patch series adds support for PCIe endpoint mode in both the driver as well as
> > in DT.
> > This patch series depends on the changes made for Synopsys DesignWare endpoint
> > mode subsystem that are recently accepted.
> > @ https://patchwork.kernel.org/project/linux-pci/list/?series=202211
> > which in turn depends on the patch made by Kishon
> > @ https://patchwork.kernel.org/patch/10975123/
> > which is also under review.
> > 
> > V4:
> > * Started using threaded irqs instead of kthreads
> > 
> > V3:
> > * Re-ordered patches in the series to make the driver change as the last patch
> > * Took care of Thierry's review comments
> > 
> > V2:
> > * Addressed Thierry & Bjorn's review comments
> > * Added EP mode specific binding documentation to already existing binding documentation file
> > * Removed patch that enables GPIO controller nodes explicitly as they are enabled already
> > 
> > Vidya Sagar (5):
> >   soc/tegra: bpmp: Update ABI header
> >   dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194
> >   arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
> >   arm64: tegra: Add support for PCIe endpoint mode in P2972-0000
> >     platform
> >   PCI: tegra: Add support for PCIe endpoint mode in Tegra194
> 
> Hi Lorenzo,
> 
> I've acked patches 1, 2 and 5 of the series. I think you're going to
> need to apply patch 1 in order to satisfy a build-time dependency from
> patch 5. I can apply patches 3 and 4 to the Tegra tree since they're
> only adding device tree content that may conflict with some other
> patches that I have in the Tegra tree.
> 
> Does that sound reasonable?

Sure, that's absolutely fine by me, I will do.

Thanks,
Lorenzo
Lorenzo Pieralisi March 3, 2020, 5:01 p.m. UTC | #4
On Tue, Mar 03, 2020 at 04:24:13PM +0530, Vidya Sagar wrote:
> Tegra194 has three (C0, C4 & C5) dual mode PCIe controllers that can operate
> either in root port mode or in end point mode but only in one mode at a time.
> Platform P2972-0000 supports enabling endpoint mode for C5 controller. This
> patch series adds support for PCIe endpoint mode in both the driver as well as
> in DT.
> This patch series depends on the changes made for Synopsys DesignWare endpoint
> mode subsystem that are recently accepted.
> @ https://patchwork.kernel.org/project/linux-pci/list/?series=202211
> which in turn depends on the patch made by Kishon
> @ https://patchwork.kernel.org/patch/10975123/
> which is also under review.
> 
> V4:
> * Started using threaded irqs instead of kthreads

Hi Vidya,

sorry for the bother, may I ask you to rebase the series (after
answering Thierry's query) on top of my pci/endpoint branch please ?

Please resend it and I will merge patches {1,2,5} then.

Thanks,
Lorenzo

> V3:
> * Re-ordered patches in the series to make the driver change as the last patch
> * Took care of Thierry's review comments
> 
> V2:
> * Addressed Thierry & Bjorn's review comments
> * Added EP mode specific binding documentation to already existing binding documentation file
> * Removed patch that enables GPIO controller nodes explicitly as they are enabled already
> 
> Vidya Sagar (5):
>   soc/tegra: bpmp: Update ABI header
>   dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194
>   arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
>   arm64: tegra: Add support for PCIe endpoint mode in P2972-0000
>     platform
>   PCI: tegra: Add support for PCIe endpoint mode in Tegra194
> 
>  .../bindings/pci/nvidia,tegra194-pcie.txt     | 125 +++-
>  .../boot/dts/nvidia/tegra194-p2972-0000.dts   |  18 +
>  arch/arm64/boot/dts/nvidia/tegra194.dtsi      |  99 +++
>  drivers/pci/controller/dwc/Kconfig            |  30 +-
>  drivers/pci/controller/dwc/pcie-tegra194.c    | 681 +++++++++++++++++-
>  include/soc/tegra/bpmp-abi.h                  |  10 +-
>  6 files changed, 918 insertions(+), 45 deletions(-)
> 
> -- 
> 2.17.1
>
Vidya Sagar March 3, 2020, 6:13 p.m. UTC | #5
On 3/3/2020 10:31 PM, Lorenzo Pieralisi wrote:
> External email: Use caution opening links or attachments
> 
> 
> On Tue, Mar 03, 2020 at 04:24:13PM +0530, Vidya Sagar wrote:
>> Tegra194 has three (C0, C4 & C5) dual mode PCIe controllers that can operate
>> either in root port mode or in end point mode but only in one mode at a time.
>> Platform P2972-0000 supports enabling endpoint mode for C5 controller. This
>> patch series adds support for PCIe endpoint mode in both the driver as well as
>> in DT.
>> This patch series depends on the changes made for Synopsys DesignWare endpoint
>> mode subsystem that are recently accepted.
>> @ https://patchwork.kernel.org/project/linux-pci/list/?series=202211
>> which in turn depends on the patch made by Kishon
>> @ https://patchwork.kernel.org/patch/10975123/
>> which is also under review.
>>
>> V4:
>> * Started using threaded irqs instead of kthreads
> 
> Hi Vidya,
> 
> sorry for the bother, may I ask you to rebase the series (after
> answering Thierry's query) on top of my pci/endpoint branch please ?
> 
> Please resend it and I will merge patches {1,2,5} then.
Sure.
I just sent V5 series rebasing patches on top of your pci/endpoint branch.

Thanks,
Vidya Sagar
> 
> Thanks,
> Lorenzo
> 
>> V3:
>> * Re-ordered patches in the series to make the driver change as the last patch
>> * Took care of Thierry's review comments
>>
>> V2:
>> * Addressed Thierry & Bjorn's review comments
>> * Added EP mode specific binding documentation to already existing binding documentation file
>> * Removed patch that enables GPIO controller nodes explicitly as they are enabled already
>>
>> Vidya Sagar (5):
>>    soc/tegra: bpmp: Update ABI header
>>    dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194
>>    arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
>>    arm64: tegra: Add support for PCIe endpoint mode in P2972-0000
>>      platform
>>    PCI: tegra: Add support for PCIe endpoint mode in Tegra194
>>
>>   .../bindings/pci/nvidia,tegra194-pcie.txt     | 125 +++-
>>   .../boot/dts/nvidia/tegra194-p2972-0000.dts   |  18 +
>>   arch/arm64/boot/dts/nvidia/tegra194.dtsi      |  99 +++
>>   drivers/pci/controller/dwc/Kconfig            |  30 +-
>>   drivers/pci/controller/dwc/pcie-tegra194.c    | 681 +++++++++++++++++-
>>   include/soc/tegra/bpmp-abi.h                  |  10 +-
>>   6 files changed, 918 insertions(+), 45 deletions(-)
>>
>> --
>> 2.17.1
>>
Vidya Sagar March 10, 2020, 5:42 p.m. UTC | #6
On 3/3/2020 11:43 PM, Vidya Sagar wrote:
> 
> 
> On 3/3/2020 10:31 PM, Lorenzo Pieralisi wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> On Tue, Mar 03, 2020 at 04:24:13PM +0530, Vidya Sagar wrote:
>>> Tegra194 has three (C0, C4 & C5) dual mode PCIe controllers that can 
>>> operate
>>> either in root port mode or in end point mode but only in one mode at 
>>> a time.
>>> Platform P2972-0000 supports enabling endpoint mode for C5 
>>> controller. This
>>> patch series adds support for PCIe endpoint mode in both the driver 
>>> as well as
>>> in DT.
>>> This patch series depends on the changes made for Synopsys DesignWare 
>>> endpoint
>>> mode subsystem that are recently accepted.
>>> @ https://patchwork.kernel.org/project/linux-pci/list/?series=202211
>>> which in turn depends on the patch made by Kishon
>>> @ https://patchwork.kernel.org/patch/10975123/
>>> which is also under review.
>>>
>>> V4:
>>> * Started using threaded irqs instead of kthreads
>>
>> Hi Vidya,
>>
>> sorry for the bother, may I ask you to rebase the series (after
>> answering Thierry's query) on top of my pci/endpoint branch please ?
>>
>> Please resend it and I will merge patches {1,2,5} then.
> Sure.
> I just sent V5 series rebasing patches on top of your pci/endpoint branch.
Hi,
Sorry to bother you again.
Could you please take a look at V5 series?

Thanks,
Vidya Sagar
> 
> Thanks,
> Vidya Sagar
>>
>> Thanks,
>> Lorenzo
>>
>>> V3:
>>> * Re-ordered patches in the series to make the driver change as the 
>>> last patch
>>> * Took care of Thierry's review comments
>>>
>>> V2:
>>> * Addressed Thierry & Bjorn's review comments
>>> * Added EP mode specific binding documentation to already existing 
>>> binding documentation file
>>> * Removed patch that enables GPIO controller nodes explicitly as they 
>>> are enabled already
>>>
>>> Vidya Sagar (5):
>>>    soc/tegra: bpmp: Update ABI header
>>>    dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194
>>>    arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
>>>    arm64: tegra: Add support for PCIe endpoint mode in P2972-0000
>>>      platform
>>>    PCI: tegra: Add support for PCIe endpoint mode in Tegra194
>>>
>>>   .../bindings/pci/nvidia,tegra194-pcie.txt     | 125 +++-
>>>   .../boot/dts/nvidia/tegra194-p2972-0000.dts   |  18 +
>>>   arch/arm64/boot/dts/nvidia/tegra194.dtsi      |  99 +++
>>>   drivers/pci/controller/dwc/Kconfig            |  30 +-
>>>   drivers/pci/controller/dwc/pcie-tegra194.c    | 681 +++++++++++++++++-
>>>   include/soc/tegra/bpmp-abi.h                  |  10 +-
>>>   6 files changed, 918 insertions(+), 45 deletions(-)
>>>
>>> -- 
>>> 2.17.1
>>>
Lorenzo Pieralisi March 10, 2020, 5:58 p.m. UTC | #7
On Tue, Mar 10, 2020 at 11:12:35PM +0530, Vidya Sagar wrote:
> 
> 
> On 3/3/2020 11:43 PM, Vidya Sagar wrote:
> > 
> > 
> > On 3/3/2020 10:31 PM, Lorenzo Pieralisi wrote:
> > > External email: Use caution opening links or attachments
> > > 
> > > 
> > > On Tue, Mar 03, 2020 at 04:24:13PM +0530, Vidya Sagar wrote:
> > > > Tegra194 has three (C0, C4 & C5) dual mode PCIe controllers that
> > > > can operate
> > > > either in root port mode or in end point mode but only in one
> > > > mode at a time.
> > > > Platform P2972-0000 supports enabling endpoint mode for C5
> > > > controller. This
> > > > patch series adds support for PCIe endpoint mode in both the
> > > > driver as well as
> > > > in DT.
> > > > This patch series depends on the changes made for Synopsys
> > > > DesignWare endpoint
> > > > mode subsystem that are recently accepted.
> > > > @ https://patchwork.kernel.org/project/linux-pci/list/?series=202211
> > > > which in turn depends on the patch made by Kishon
> > > > @ https://patchwork.kernel.org/patch/10975123/
> > > > which is also under review.
> > > > 
> > > > V4:
> > > > * Started using threaded irqs instead of kthreads
> > > 
> > > Hi Vidya,
> > > 
> > > sorry for the bother, may I ask you to rebase the series (after
> > > answering Thierry's query) on top of my pci/endpoint branch please ?
> > > 
> > > Please resend it and I will merge patches {1,2,5} then.
> > Sure.
> > I just sent V5 series rebasing patches on top of your pci/endpoint branch.
> Hi,
> Sorry to bother you again.
> Could you please take a look at V5 series?

I will merge it tomorrow, apologies.

Thanks,
Lorenzo