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[0/3] clk: meson: gxbb: audio clock updates

Message ID 20200122100451.2443153-1-jbrunet@baylibre.com
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Series clk: meson: gxbb: audio clock updates | expand

Message

Jerome Brunet Jan. 22, 2020, 10:04 a.m. UTC 
This patcheset provides updates related to the audio peripheral clocks
It adds the peripheral clock required by the internal audio dac
and reorganize the AIU clocks into a hierarchy to better reflect the
behavior of the SoC.

Jerome Brunet (3):
  dt-bindings: clk: meson: add the gxl internal dac gate
  clk: meson: gxbb: add the gxl internal dac gate
  clk: meson: gxbb: set audio output clock hierarchy

 drivers/clk/meson/gxbb.c              | 21 +++++++++++++--------
 drivers/clk/meson/gxbb.h              |  2 +-
 include/dt-bindings/clock/gxbb-clkc.h |  1 +
 3 files changed, 15 insertions(+), 9 deletions(-)

Comments

Neil Armstrong Jan. 23, 2020, 9:51 a.m. UTC | #1 
On 22/01/2020 11:04, Jerome Brunet wrote:
> Add the ACODEC clock gate to the gxl clk controller driver
> 
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/clk/meson/gxbb.c | 3 +++
>  drivers/clk/meson/gxbb.h | 2 +-
>  2 files changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
> index 1f9c056e684c..47916c4f1700 100644
> --- a/drivers/clk/meson/gxbb.c
> +++ b/drivers/clk/meson/gxbb.c
> @@ -2613,6 +2613,7 @@ static MESON_GATE(gxbb_assist_misc, HHI_GCLK_MPEG0, 23);
>  static MESON_GATE(gxbb_emmc_a, HHI_GCLK_MPEG0, 24);
>  static MESON_GATE(gxbb_emmc_b, HHI_GCLK_MPEG0, 25);
>  static MESON_GATE(gxbb_emmc_c, HHI_GCLK_MPEG0, 26);
> +static MESON_GATE(gxl_acodec, HHI_GCLK_MPEG0, 28);
>  static MESON_GATE(gxbb_spi, HHI_GCLK_MPEG0, 30);
>  
>  static MESON_GATE(gxbb_i2s_spdif, HHI_GCLK_MPEG1, 2);
> @@ -3100,6 +3101,7 @@ static struct clk_hw_onecell_data gxl_hw_onecell_data = {
>  		[CLKID_HDMI_SEL]	    = &gxbb_hdmi_sel.hw,
>  		[CLKID_HDMI_DIV]	    = &gxbb_hdmi_div.hw,
>  		[CLKID_HDMI]		    = &gxbb_hdmi.hw,
> +		[CLKID_ACODEC]		    = &gxl_acodec.hw,
>  		[NR_CLKS]		    = NULL,
>  	},
>  	.num = NR_CLKS,
> @@ -3491,6 +3493,7 @@ static struct clk_regmap *const gxl_clk_regmaps[] = {
>  	&gxl_hdmi_pll_od,
>  	&gxl_hdmi_pll_od2,
>  	&gxl_hdmi_pll_dco,
> +	&gxl_acodec,
>  };
>  
>  static const struct meson_eeclkc_data gxbb_clkc_data = {
> diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
> index b53584fe66cf..1ee8cb7e2f5a 100644
> --- a/drivers/clk/meson/gxbb.h
> +++ b/drivers/clk/meson/gxbb.h
> @@ -188,7 +188,7 @@
>  #define CLKID_HDMI_SEL		  203
>  #define CLKID_HDMI_DIV		  204
>  
> -#define NR_CLKS			  206
> +#define NR_CLKS			  207
>  
>  /* include the CLKIDs that have been made part of the DT binding */
>  #include <dt-bindings/clock/gxbb-clkc.h>
> 

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong Jan. 23, 2020, 9:51 a.m. UTC | #2 
On 22/01/2020 11:04, Jerome Brunet wrote:
> The aiu devices peripheral clocks needs the aiu and aiu_glue clocks to
> operate. Reflect this hierarchy in the gxbb clock tree.
> 
> Fixes: 738f66d3211d ("clk: gxbb: add AmLogic GXBB clk controller driver")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/clk/meson/gxbb.c | 18 ++++++++++--------
>  1 file changed, 10 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
> index 47916c4f1700..5fd6a574f8c3 100644
> --- a/drivers/clk/meson/gxbb.c
> +++ b/drivers/clk/meson/gxbb.c
> @@ -2619,14 +2619,6 @@ static MESON_GATE(gxbb_spi, HHI_GCLK_MPEG0, 30);
>  static MESON_GATE(gxbb_i2s_spdif, HHI_GCLK_MPEG1, 2);
>  static MESON_GATE(gxbb_eth, HHI_GCLK_MPEG1, 3);
>  static MESON_GATE(gxbb_demux, HHI_GCLK_MPEG1, 4);
> -static MESON_GATE(gxbb_aiu_glue, HHI_GCLK_MPEG1, 6);
> -static MESON_GATE(gxbb_iec958, HHI_GCLK_MPEG1, 7);
> -static MESON_GATE(gxbb_i2s_out, HHI_GCLK_MPEG1, 8);
> -static MESON_GATE(gxbb_amclk, HHI_GCLK_MPEG1, 9);
> -static MESON_GATE(gxbb_aififo2, HHI_GCLK_MPEG1, 10);
> -static MESON_GATE(gxbb_mixer, HHI_GCLK_MPEG1, 11);
> -static MESON_GATE(gxbb_mixer_iface, HHI_GCLK_MPEG1, 12);
> -static MESON_GATE(gxbb_adc, HHI_GCLK_MPEG1, 13);
>  static MESON_GATE(gxbb_blkmv, HHI_GCLK_MPEG1, 14);
>  static MESON_GATE(gxbb_aiu, HHI_GCLK_MPEG1, 15);
>  static MESON_GATE(gxbb_uart1, HHI_GCLK_MPEG1, 16);
> @@ -2681,6 +2673,16 @@ static MESON_GATE(gxbb_ao_ahb_bus, HHI_GCLK_AO, 2);
>  static MESON_GATE(gxbb_ao_iface, HHI_GCLK_AO, 3);
>  static MESON_GATE(gxbb_ao_i2c, HHI_GCLK_AO, 4);
>  
> +/* AIU gates */
> +static MESON_PCLK(gxbb_aiu_glue, HHI_GCLK_MPEG1, 6, &gxbb_aiu.hw);
> +static MESON_PCLK(gxbb_iec958, HHI_GCLK_MPEG1, 7, &gxbb_aiu_glue.hw);
> +static MESON_PCLK(gxbb_i2s_out, HHI_GCLK_MPEG1, 8, &gxbb_aiu_glue.hw);
> +static MESON_PCLK(gxbb_amclk, HHI_GCLK_MPEG1, 9, &gxbb_aiu_glue.hw);
> +static MESON_PCLK(gxbb_aififo2, HHI_GCLK_MPEG1, 10, &gxbb_aiu_glue.hw);
> +static MESON_PCLK(gxbb_mixer, HHI_GCLK_MPEG1, 11, &gxbb_aiu_glue.hw);
> +static MESON_PCLK(gxbb_mixer_iface, HHI_GCLK_MPEG1, 12, &gxbb_aiu_glue.hw);
> +static MESON_PCLK(gxbb_adc, HHI_GCLK_MPEG1, 13, &gxbb_aiu_glue.hw);
> +
>  /* Array of all clocks provided by this provider */
>  
>  static struct clk_hw_onecell_data gxbb_hw_onecell_data = {
> 

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet Feb. 13, 2020, 4:35 p.m. UTC | #3 
On Wed 22 Jan 2020 at 11:04, Jerome Brunet <jbrunet@baylibre.com> wrote:

> This patcheset provides updates related to the audio peripheral clocks
> It adds the peripheral clock required by the internal audio dac
> and reorganize the AIU clocks into a hierarchy to better reflect the
> behavior of the SoC.
>
> Jerome Brunet (3):
>   dt-bindings: clk: meson: add the gxl internal dac gate
>   clk: meson: gxbb: add the gxl internal dac gate
>   clk: meson: gxbb: set audio output clock hierarchy
>
>  drivers/clk/meson/gxbb.c              | 21 +++++++++++++--------
>  drivers/clk/meson/gxbb.h              |  2 +-
>  include/dt-bindings/clock/gxbb-clkc.h |  1 +
>  3 files changed, 15 insertions(+), 9 deletions(-)

Applied