From patchwork Wed Oct 23 12:29:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 1182103 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=glider.be Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 46yqSt0Q9wz9sQw for ; Wed, 23 Oct 2019 23:29:50 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391320AbfJWM3s (ORCPT ); Wed, 23 Oct 2019 08:29:48 -0400 Received: from albert.telenet-ops.be ([195.130.137.90]:36694 "EHLO albert.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391315AbfJWM3s (ORCPT ); Wed, 23 Oct 2019 08:29:48 -0400 Received: from ramsan ([84.194.98.4]) by albert.telenet-ops.be with bizsmtp id H0Vl2100b05gfCL060Vl6w; Wed, 23 Oct 2019 14:29:46 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan with esmtp (Exim 4.90_1) (envelope-from ) id 1iNFlp-0000eH-QF; Wed, 23 Oct 2019 14:29:45 +0200 Received: from geert by rox.of.borg with local (Exim 4.90_1) (envelope-from ) id 1iNFlp-0003Du-Of; Wed, 23 Oct 2019 14:29:45 +0200 From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Cc: Eugeniu Rosca , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH v2 0/4] clk: renesas: Add r8a77961 support Date: Wed, 23 Oct 2019 14:29:37 +0200 Message-Id: <20191023122941.12342-1-geert+renesas@glider.be> X-Mailer: git-send-email 2.17.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi all, This patch series adds support for the Clock Pulse Generator / Module Standby and Software Reset block in the Renesas R-Car M3-W+ (R8A77961) SoC. As R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), the existing driver for R-Car M3-W is updated to handle both. To avoid confusion between R-Car M3-W and M3-W+, the existing config symbol for M3-W is renamed to CLK_R8A77960 in a dependency-free way, and references to r8a7796 are updated. Changes compared to v1[1]: - Split in per-subsystem series, - Add Reviewed-by, Tested-by, - Rename CLK_R8A7796, - Update r8a7796 references, I intend to queue this series in clk-renesas-for-v5.5. The second patch will be put on a branch shared between driver and DTS. Thanks for your comments! [1] "[PATCH/RFC 00/19] arm64: dts: renesas: Initial support for R-Car M3-W+" https://lore.kernel.org/linux-renesas-soc/20191007102332.12196-1-geert+renesas@glider.be/ Geert Uytterhoeven (4): dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960 clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support .../bindings/clock/renesas,cpg-mssr.txt | 11 ++-- drivers/clk/renesas/Kconfig | 9 ++- drivers/clk/renesas/Makefile | 3 +- drivers/clk/renesas/r8a7796-cpg-mssr.c | 24 +++++-- drivers/clk/renesas/renesas-cpg-mssr.c | 8 ++- include/dt-bindings/clock/r8a77961-cpg-mssr.h | 65 +++++++++++++++++++ 6 files changed, 107 insertions(+), 13 deletions(-) create mode 100644 include/dt-bindings/clock/r8a77961-cpg-mssr.h Reviewed-by: Yoshihiro Shimoda