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[net-next,v2,0/3] net: phy: add Amlogic g12a support

Message ID 20190329141512.29867-1-jbrunet@baylibre.com
Headers show
Series net: phy: add Amlogic g12a support | expand

Message

Jerome Brunet March 29, 2019, 2:15 p.m. UTC 
This patchset adds the necessary bits to support network on the Amlogic
g12a SoC family.

Only the internal PHY and related MDIO mux needed to be addressed.
The GMAC remains compatible with axg SoC family

This series has been tested on the u200 (S905D2) with both the internal
and external (Realtek) PHYs.

Change since v1 [0]:
* drop '_' from function name unrelated to locking
* fix peripheral clock disable on error
* fix variable declaration reverse Xmas trees
* fix Kconfig dependency on CCF
  (Actually needed for 'struct clk_hw', Thx Andrew !)
* Minor fix in the DT exemple as reported by Rob

[0] https://lkml.kernel.org/r/20190314140135.19184-1-jbrunet@baylibre.com

Jerome Brunet (3):
  dt-bindings: net: phy: add g12a mdio mux documentation
  net: phy: add amlogic g12a mdio mux support
  net: phy: meson-gxl: add g12a support

 .../bindings/net/mdio-mux-meson-g12a.txt      |  48 +++
 drivers/net/phy/Kconfig                       |  10 +
 drivers/net/phy/Makefile                      |   1 +
 drivers/net/phy/mdio-mux-meson-g12a.c         | 379 ++++++++++++++++++
 drivers/net/phy/meson-gxl.c                   |  14 +
 5 files changed, 452 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt
 create mode 100644 drivers/net/phy/mdio-mux-meson-g12a.c

Comments

Heiner Kallweit March 29, 2019, 7:22 p.m. UTC | #1 
On 29.03.2019 15:15, Jerome Brunet wrote:
> The g12a SoC family uses the type of internal PHY that was used on the
> gxl family. The quirks of gxl family, like the LPA register corruption,
> appear to have been resolved on this new SoC generation.
> 
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>  drivers/net/phy/meson-gxl.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c
> index 0eec2913c289..49cad0f4c79b 100644
> --- a/drivers/net/phy/meson-gxl.c
> +++ b/drivers/net/phy/meson-gxl.c
> @@ -237,11 +237,25 @@ static struct phy_driver meson_gxl_phy[] = {
>  		.config_intr	= meson_gxl_config_intr,
>  		.suspend        = genphy_suspend,
>  		.resume         = genphy_resume,
> +	}, {
> +		.phy_id		= 0x01803301,
> +		.phy_id_mask	= 0xffffffff,

Here you could use the PHY_ID_MATCH_EXACT() macro, see realtek PHY
driver for an example.

> +		.name		= "Meson G12A Internal PHY",
> +		.features	= PHY_BASIC_FEATURES,
> +		.flags		= PHY_IS_INTERNAL,
> +		.soft_reset     = genphy_soft_reset,
> +		.aneg_done      = genphy_aneg_done,
> +		.read_status	= genphy_read_status,

genphy_aneg_done() and genphy_read_status() are used automatically
as fallback if no callback is defined. You can omit these two lines.

> +		.ack_interrupt	= meson_gxl_ack_interrupt,
> +		.config_intr	= meson_gxl_config_intr,
> +		.suspend        = genphy_suspend,
> +		.resume         = genphy_resume,
>  	},
>  };
>  
>  static struct mdio_device_id __maybe_unused meson_gxl_tbl[] = {
>  	{ 0x01814400, 0xfffffff0 },
> +	{ 0x01803301, 0xffffffff },

Also a candidate for PHY_ID_MATCH_EXACT. In the line before
PHY_ID_MATCH_MODEL could be used.

>  	{ }
>  };
>  
>
Stephen Boyd March 29, 2019, 10:49 p.m. UTC | #2 
Quoting Jerome Brunet (2019-03-29 07:15:11)
> Add support for the mdio mux and internal phy glue of the g12a SoC family
> 
> [for the clock part]
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

I think you should write it like:

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> # clk parts