| Message ID | 20181218210417.30140-1-jae.hyun.yoo@linux.intel.com |
|---|---|
| Headers | show |
| Series | PECI device driver introduction | expand |
On Tue, 18 Dec 2018, Jae Hyun Yoo wrote: > This commit adds PECI client MFD driver. > > Cc: Lee Jones <lee.jones@linaro.org> > Cc: Randy Dunlap <rdunlap@infradead.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Andrew Jeffery <andrew@aj.id.au> > Cc: James Feist <james.feist@linux.intel.com> > Cc: Jason M Biils <jason.m.bills@linux.intel.com> > Cc: Joel Stanley <joel@jms.id.au> > Cc: Vernon Mauery <vernon.mauery@linux.intel.com> > Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> > --- > drivers/mfd/Kconfig | 14 +++ > drivers/mfd/Makefile | 1 + > drivers/mfd/intel-peci-client.c | 150 ++++++++++++++++++++++++++ > include/linux/mfd/intel-peci-client.h | 110 +++++++++++++++++++ > 4 files changed, 275 insertions(+) > create mode 100644 drivers/mfd/intel-peci-client.c > create mode 100644 include/linux/mfd/intel-peci-client.h > > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig > index 8c5dfdce4326..d021aa8dfa99 100644 > --- a/drivers/mfd/Kconfig > +++ b/drivers/mfd/Kconfig > @@ -604,6 +604,20 @@ config MFD_INTEL_MSIC > Passage) chip. This chip embeds audio, battery, GPIO, etc. > devices used in Intel Medfield platforms. > > +config MFD_INTEL_PECI_CLIENT > + bool "Intel PECI client" > + depends on (PECI || COMPILE_TEST) > + select MFD_CORE > + help > + If you say yes to this option, support will be included for the > + Intel PECI (Platform Environment Control Interface) client. PECI is a > + one-wire bus interface that provides a communication channel from PECI > + clients in Intel processors and chipset components to external > + monitoring or control devices. This driver doesn't appear to actually do anything that can't be done in a header file i.e. match some static data with a CPU ID. The child devices can be registered by whatever registers this device. It seems superfluous. Why do you need it? > + Additional drivers must be enabled in order to use the functionality > + of the device. > + > config MFD_IPAQ_MICRO > bool "Atmel Micro ASIC (iPAQ h3100/h3600/h3700) Support" > depends on SA1100_H3100 || SA1100_H3600 > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile > index 12980a4ad460..b8c1da8e748b 100644 > --- a/drivers/mfd/Makefile > +++ b/drivers/mfd/Makefile > @@ -204,6 +204,7 @@ obj-$(CONFIG_MFD_INTEL_LPSS) += intel-lpss.o > obj-$(CONFIG_MFD_INTEL_LPSS_PCI) += intel-lpss-pci.o > obj-$(CONFIG_MFD_INTEL_LPSS_ACPI) += intel-lpss-acpi.o > obj-$(CONFIG_MFD_INTEL_MSIC) += intel_msic.o > +obj-$(CONFIG_MFD_INTEL_PECI_CLIENT) += intel-peci-client.o > obj-$(CONFIG_MFD_PALMAS) += palmas.o > obj-$(CONFIG_MFD_VIPERBOARD) += viperboard.o > obj-$(CONFIG_MFD_RC5T583) += rc5t583.o rc5t583-irq.o > diff --git a/drivers/mfd/intel-peci-client.c b/drivers/mfd/intel-peci-client.c > new file mode 100644 > index 000000000000..d53e4f1078ac > --- /dev/null > +++ b/drivers/mfd/intel-peci-client.c > @@ -0,0 +1,150 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// Copyright (c) 2018 Intel Corporation > + > +#include <linux/bitfield.h> > +#include <linux/mfd/core.h> > +#include <linux/mfd/intel-peci-client.h> > +#include <linux/module.h> > +#include <linux/peci.h> > +#include <linux/of_device.h> Alphabetical. > +#define CPU_ID_MODEL_MASK GENMASK(7, 4) > +#define CPU_ID_FAMILY_MASK GENMASK(11, 8) > +#define CPU_ID_EXT_MODEL_MASK GENMASK(19, 16) > +#define CPU_ID_EXT_FAMILY_MASK GENMASK(27, 20) > + > +#define LOWER_NIBBLE_MASK GENMASK(3, 0) > +#define UPPER_NIBBLE_MASK GENMASK(7, 4) > +#define LOWER_BYTE_MASK GENMASK(7, 0) > +#define UPPER_BYTE_MASK GENMASK(16, 8) > + > +enum cpu_gens { > + CPU_GEN_HSX = 0, /* Haswell Xeon */ > + CPU_GEN_BRX, /* Broadwell Xeon */ > + CPU_GEN_SKX, /* Skylake Xeon */ > +}; This is unused. > +static struct mfd_cell peci_functions[] = { > + { .name = "peci-cputemp", }, > + { .name = "peci-dimmtemp", }, > + /* TODO: Add additional PECI sideband functions into here */ > +}; > + > +static const struct cpu_gen_info cpu_gen_info_table[] = { > + [CPU_GEN_HSX] = { > + .family = 6, /* Family code */ > + .model = INTEL_FAM6_HASWELL_X, > + .core_max = CORE_MAX_ON_HSX, > + .chan_rank_max = CHAN_RANK_MAX_ON_HSX, > + .dimm_idx_max = DIMM_IDX_MAX_ON_HSX }, > + [CPU_GEN_BRX] = { > + .family = 6, /* Family code */ > + .model = INTEL_FAM6_BROADWELL_X, > + .core_max = CORE_MAX_ON_BDX, > + .chan_rank_max = CHAN_RANK_MAX_ON_BDX, > + .dimm_idx_max = DIMM_IDX_MAX_ON_BDX }, > + [CPU_GEN_SKX] = { > + .family = 6, /* Family code */ > + .model = INTEL_FAM6_SKYLAKE_X, > + .core_max = CORE_MAX_ON_SKX, > + .chan_rank_max = CHAN_RANK_MAX_ON_SKX, > + .dimm_idx_max = DIMM_IDX_MAX_ON_SKX }, > +}; > + > +static int peci_client_get_cpu_gen_info(struct peci_client_manager *priv) > +{ > + u32 cpu_id; > + u16 family; > + u8 model; > + int rc; ret is almost ubiquitous in the kernel. Please use it instead. > + int i; > + > + rc = peci_get_cpu_id(priv->client->adapter, priv->client->addr, > + &cpu_id); > + if (rc) > + return rc; > + > + family = FIELD_PREP(LOWER_BYTE_MASK, > + FIELD_GET(CPU_ID_FAMILY_MASK, cpu_id)) | > + FIELD_PREP(UPPER_BYTE_MASK, > + FIELD_GET(CPU_ID_EXT_FAMILY_MASK, cpu_id)); > + model = FIELD_PREP(LOWER_NIBBLE_MASK, > + FIELD_GET(CPU_ID_MODEL_MASK, cpu_id)) | > + FIELD_PREP(UPPER_NIBBLE_MASK, > + FIELD_GET(CPU_ID_EXT_MODEL_MASK, cpu_id)); > + > + for (i = 0; i < ARRAY_SIZE(cpu_gen_info_table); i++) { > + const struct cpu_gen_info *cpu_info = &cpu_gen_info_table[i]; > + > + if (family == cpu_info->family && model == cpu_info->model) { > + priv->gen_info = cpu_info; > + break; > + } > + } > + > + if (!priv->gen_info) { > + dev_err(priv->dev, "Can't support this CPU: 0x%x\n", cpu_id); > + rc = -ENODEV; > + } > + > + return rc; > +} > + > +static int peci_client_probe(struct peci_client *client) > +{ > + struct device *dev = &client->dev; > + struct peci_client_manager *priv; > + uint cpu_no; > + int ret; > + > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + > + dev_set_drvdata(dev, priv); > + priv->client = client; > + priv->dev = dev; If you have client (Which contains dev, you don't need dev). > + cpu_no = client->addr - PECI_BASE_ADDR; > + > + ret = peci_client_get_cpu_gen_info(priv); > + if (ret) > + return ret; > + > + ret = devm_mfd_add_devices(priv->dev, cpu_no, peci_functions, > + ARRAY_SIZE(peci_functions), NULL, 0, NULL); > + if (ret < 0) { > + dev_err(priv->dev, "Failed to register child devices: %d\n", > + ret); > + return ret; > + } > + > + return 0; > +} > + > +#ifdef CONFIG_OF > +static const struct of_device_id peci_client_of_table[] = { > + { .compatible = "intel,peci-client" }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, peci_client_of_table); > +#endif > + > +static const struct peci_device_id peci_client_ids[] = { > + { .name = "peci-client" }, > + { } > +}; > +MODULE_DEVICE_TABLE(peci, peci_client_ids); > + > +static struct peci_driver peci_client_driver = { > + .probe = peci_client_probe, > + .id_table = peci_client_ids, > + .driver = { > + .name = "peci-client", > + .of_match_table = of_match_ptr(peci_client_of_table), > + }, > +}; > +module_peci_driver(peci_client_driver); > + > +MODULE_AUTHOR("Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>"); > +MODULE_DESCRIPTION("PECI client driver"); > +MODULE_LICENSE("GPL v2"); > diff --git a/include/linux/mfd/intel-peci-client.h b/include/linux/mfd/intel-peci-client.h > new file mode 100644 > index 000000000000..8f6d823a59cd > --- /dev/null > +++ b/include/linux/mfd/intel-peci-client.h > @@ -0,0 +1,110 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* Copyright (c) 2018 Intel Corporation */ > + > +#ifndef __LINUX_MFD_INTEL_PECI_CLIENT_H > +#define __LINUX_MFD_INTEL_PECI_CLIENT_H > + > +#include <linux/peci.h> > + > +#if IS_ENABLED(CONFIG_X86) > +#include <asm/intel-family.h> > +#else > +/** > + * Architectures other than x86 cannot include the header file so define these > + * at here. These are needed for detecting type of client x86 CPUs behind a PECI > + * connection. > + */ > +#define INTEL_FAM6_HASWELL_X 0x3F > +#define INTEL_FAM6_BROADWELL_X 0x4F > +#define INTEL_FAM6_SKYLAKE_X 0x55 > +#endif > + > +#define CORE_MAX_ON_HSX 18 /* Max number of cores on Haswell */ > +#define CHAN_RANK_MAX_ON_HSX 8 /* Max number of channel ranks on Haswell */ > +#define DIMM_IDX_MAX_ON_HSX 3 /* Max DIMM index per channel on Haswell */ > + > +#define CORE_MAX_ON_BDX 24 /* Max number of cores on Broadwell */ > +#define CHAN_RANK_MAX_ON_BDX 4 /* Max number of channel ranks on Broadwell */ > +#define DIMM_IDX_MAX_ON_BDX 3 /* Max DIMM index per channel on Broadwell */ > + > +#define CORE_MAX_ON_SKX 28 /* Max number of cores on Skylake */ > +#define CHAN_RANK_MAX_ON_SKX 6 /* Max number of channel ranks on Skylake */ > +#define DIMM_IDX_MAX_ON_SKX 2 /* Max DIMM index per channel on Skylake */ > + > +#define CORE_NUMS_MAX CORE_MAX_ON_SKX > +#define CHAN_RANK_MAX CHAN_RANK_MAX_ON_HSX > +#define DIMM_IDX_MAX DIMM_IDX_MAX_ON_HSX > +#define DIMM_NUMS_MAX (CHAN_RANK_MAX * DIMM_IDX_MAX) > + > +/** > + * struct cpu_gen_info - CPU generation specific information > + * @family: CPU family ID > + * @model: CPU model > + * @core_max: max number of cores > + * @chan_rank_max: max number of channel ranks > + * @dimm_idx_max: max number of DIMM indices > + * > + * CPU generation specific information to identify maximum number of cores and > + * DIMM slots. > + */ > +struct cpu_gen_info { > + u16 family; > + u8 model; > + uint core_max; > + uint chan_rank_max; > + uint dimm_idx_max; > +}; > + > +/** > + * struct peci_client_manager - PECI client manager information > + * @client; pointer to the PECI client > + * @dev: pointer to the struct device > + * @name: PECI client manager name > + * @gen_info: CPU generation info of the detected CPU > + * > + * PECI client manager information for managing PECI sideband functions on a CPU > + * client. > + */ > +struct peci_client_manager { > + struct peci_client *client; > + struct device *dev; > + char name[PECI_NAME_SIZE]; > + const struct cpu_gen_info *gen_info; > +}; > + > +/** > + * peci_client_read_package_config - read from the Package Configuration Space > + * @priv: driver private data structure > + * @index: encoding index for the requested service > + * @param: parameter to specify the exact data being requested > + * @data: data buffer to store the result > + * Context: can sleep > + * > + * A generic PECI command that provides read access to the > + * "Package Configuration Space" that is maintained by the PCU, including > + * various power and thermal management functions. Typical PCS read services > + * supported by the processor may include access to temperature data, energy > + * status, run time information, DIMM temperatures and so on. > + * > + * Return: zero on success, else a negative error code. > + */ > +static inline int > +peci_client_read_package_config(struct peci_client_manager *priv, > + u8 index, u16 param, u8 *data) > +{ > + struct peci_rd_pkg_cfg_msg msg; > + int rc; > + > + msg.addr = priv->client->addr; > + msg.index = index; > + msg.param = param; > + msg.rx_len = 4; > + > + rc = peci_command(priv->client->adapter, PECI_CMD_RD_PKG_CFG, &msg); > + if (!rc) > + memcpy(data, msg.pkg_config, 4); > + > + return rc; > +} > + > +#endif /* __LINUX_MFD_INTEL_PECI_CLIENT_H */
Hi Lee, On 12/21/2018 6:46 AM, Lee Jones wrote: > On Tue, 18 Dec 2018, Jae Hyun Yoo wrote: > >> This commit adds PECI client MFD driver. >> <snip> >> >> +config MFD_INTEL_PECI_CLIENT >> + bool "Intel PECI client" >> + depends on (PECI || COMPILE_TEST) >> + select MFD_CORE >> + help >> + If you say yes to this option, support will be included for the >> + Intel PECI (Platform Environment Control Interface) client. PECI is a >> + one-wire bus interface that provides a communication channel from PECI >> + clients in Intel processors and chipset components to external >> + monitoring or control devices. > > This driver doesn't appear to actually do anything that can't be done > in a header file i.e. match some static data with a CPU ID. The child > devices can be registered by whatever registers this device. > > It seems superfluous. Why do you need it? > The main reason I added it is to provide a way for sharing the same unit address from multiple side-band function drivers that read 'reg' property setting from the parent node (this driver's node). The 'reg' property reading code is not in this driver but it will be performed in peci-core when this driver is registered using module_peci_driver(peci_client_driver), and then it will provides client->addr information for all its child node drivers. <snip> >> +#include <linux/bitfield.h> >> +#include <linux/mfd/core.h> >> +#include <linux/mfd/intel-peci-client.h> >> +#include <linux/module.h> >> +#include <linux/peci.h> >> +#include <linux/of_device.h> > > Alphabetical. > Will fix it. Thanks! <snip> >> +enum cpu_gens { >> + CPU_GEN_HSX = 0, /* Haswell Xeon */ >> + CPU_GEN_BRX, /* Broadwell Xeon */ >> + CPU_GEN_SKX, /* Skylake Xeon */ >> +}; > > This is unused. > This is being used in 8 lines below but actually the static array can be initialized without using this enum type. Will remove it. >> +static struct mfd_cell peci_functions[] = { >> + { .name = "peci-cputemp", }, >> + { .name = "peci-dimmtemp", }, >> + /* TODO: Add additional PECI sideband functions into here */ >> +}; >> + >> +static const struct cpu_gen_info cpu_gen_info_table[] = { >> + [CPU_GEN_HSX] = { >> + .family = 6, /* Family code */ >> + .model = INTEL_FAM6_HASWELL_X, >> + .core_max = CORE_MAX_ON_HSX, >> + .chan_rank_max = CHAN_RANK_MAX_ON_HSX, >> + .dimm_idx_max = DIMM_IDX_MAX_ON_HSX }, >> + [CPU_GEN_BRX] = { >> + .family = 6, /* Family code */ >> + .model = INTEL_FAM6_BROADWELL_X, >> + .core_max = CORE_MAX_ON_BDX, >> + .chan_rank_max = CHAN_RANK_MAX_ON_BDX, >> + .dimm_idx_max = DIMM_IDX_MAX_ON_BDX }, >> + [CPU_GEN_SKX] = { >> + .family = 6, /* Family code */ >> + .model = INTEL_FAM6_SKYLAKE_X, >> + .core_max = CORE_MAX_ON_SKX, >> + .chan_rank_max = CHAN_RANK_MAX_ON_SKX, >> + .dimm_idx_max = DIMM_IDX_MAX_ON_SKX }, >> +}; >> + >> +static int peci_client_get_cpu_gen_info(struct peci_client_manager *priv) >> +{ >> + u32 cpu_id; >> + u16 family; >> + u8 model; >> + int rc; > > ret is almost ubiquitous in the kernel. Please use it instead. > Okay. Will change rc to ret. <snip> >> +static int peci_client_probe(struct peci_client *client) >> +{ >> + struct device *dev = &client->dev; >> + struct peci_client_manager *priv; >> + uint cpu_no; >> + int ret; >> + >> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); >> + if (!priv) >> + return -ENOMEM; >> + >> + dev_set_drvdata(dev, priv); >> + priv->client = client; >> + priv->dev = dev; > > If you have client (Which contains dev, you don't need dev). > Makes sense. Will remove the 'dev' member. <snip>
Introduction of the Platform Environment Control Interface (PECI) bus device driver. PECI is a one-wire bus interface that provides a communication channel from Intel processors and chipset components to external monitoring or control devices. PECI is designed to support the following sideband functions: * Processor and DRAM thermal management - Processor fan speed control is managed by comparing Digital Thermal Sensor (DTS) thermal readings acquired via PECI against the processor-specific fan speed control reference point, or TCONTROL. Both TCONTROL and DTS thermal readings are accessible via the processor PECI client. These variables are referenced to a common temperature, the TCC activation point, and are both defined as negative offsets from that reference. - PECI based access to the processor package configuration space provides a means for Baseboard Management Controllers (BMC) or other platform management devices to actively manage the processor and memory power and thermal features. * Platform Manageability - Platform manageability functions including thermal, power, and error monitoring. Note that platform 'power' management includes monitoring and control for both the processor and DRAM subsystem to assist with data center power limiting. - PECI allows read access to certain error registers in the processor MSR space and status monitoring registers in the PCI configuration space within the processor and downstream devices. - PECI permits writes to certain registers in the processor PCI configuration space. * Processor Interface Tuning and Diagnostics - Processor interface tuning and diagnostics capabilities (Intel Interconnect BIST). The processors Intel Interconnect Built In Self Test (Intel IBIST) allows for infield diagnostic capabilities in the Intel UPI and memory controller interfaces. PECI provides a port to execute these diagnostics via its PCI Configuration read and write capabilities. * Failure Analysis - Output the state of the processor after a failure for analysis via Crashdump. PECI uses a single wire for self-clocking and data transfer. The bus requires no additional control lines. The physical layer is a self-clocked one-wire bus that begins each bit with a driven, rising edge from an idle level near zero volts. The duration of the signal driven high depends on whether the bit value is a logic '0' or logic '1'. PECI also includes variable data transfer rate established with every message. In this way, it is highly flexible even though underlying logic is simple. The interface design was optimized for interfacing between an Intel processor and chipset components in both single processor and multiple processor environments. The single wire interface provides low board routing overhead for the multiple load connections in the congested routing area near the processor and chipset components. Bus speed, error checking, and low protocol overhead provides adequate link bandwidth and reliability to transfer critical device operating conditions and configuration information. This implementation provides the basic framework to add PECI extensions to the Linux bus and device models. A hardware specific 'Adapter' driver can be attached to the PECI bus to provide sideband functions described above. It is also possible to access all devices on an adapter from userspace through the /dev interface. A device specific 'Client' driver also can be attached to the PECI bus so each processor client's features can be supported by the 'Client' driver through an adapter connection in the bus. This patch set includes Aspeed 24xx/25xx PECI driver and PECI cputemp/dimmtemp drivers as the first implementation for both adapter and client drivers on the PECI bus framework. Please review. Thanks, Jae Changes since v8: - Refined descriptions in PECI device tree documents. - Fixed checking logic of supportable PECI commands using full revision number. - Fixed DIB data size to u64 to make that can contain 8-bytes of information. - Changed PECI cdev names from pecix to peci-x where x is bus number. - Refined intel-peci-client driver and moved hwmon relating codes to peci-hwmon.h. - Added missing core label strings into peci-cputemp driver. - Added kerneldoc comments. Changes since v7: - Fixed a typo in the MFD_INTEL_PECI_CLIENT description. - Made peci_unregister_device() NULL-aware. - Converted to using %pOF instead of node full name in peci-core. - Removed OF tables from peci-cputemp and peci-dimmtemp. - Removed of_compatible strings from intel-peci-client. - Added an access_ok() check into peci_ioctl in peci-core. - Changed the DT node name of peci simple-bus from 'peci' to 'bus'. Changes since v6: - Dropped off unnecessary examples from dt-bindings document. - Fixed a bug in DIMM index mask building logic. - Modified DIMM temp label strings to match with the way in BIOS. - Changed PECI ioctl base number from B6 to B7 to avoid conflict with fpga-dfl. - Separated the PECI section in MAINTAINERS into two parts - PECI subsystem and ASPEED PECI driver. Changes since v5: - Added more detailed descriptions for PECI client MFD documents. - Changed PECI client MFD souce file names. - Fixed DT example of PECI client MFD. - Removed unnecessary debug printings. - Moved the asm/intel-family.h inclusion place. Changes since v4: - Fixed an incorrect endianness handling in peci-aspeed. - Added a comment to explain about the asm/intel-family.h inclusion. - Added an MFD module to support multi-function PECI client devices. Changes since v3: - Made code more simple and compact. - Removed unused header file inclusion. - Fixed incorrect error return values and messages. - Removed DTS margin temperature from the peci-cputemp. - Made some magic numbers use defines. - Moved peci_get_cpu_id() into peci-core as a common function. - Replaced the cancel_delayed_work() call with a cancel_delayed_work_sync(). - Replaced AST and Aspeed uses with ASPEED. - Simplified peci command timeout checking logic using regmap_read_poll_timeout(). - Simplified endian swap codes using endian handling macros. - Dropped regmap read/write error checking except for the first access. - Added a PECI reset setting in the device tree node. - Removed unnecessary sleep from the probe context. - Removed IRQF_SHARED flag from irq request code in the ASPEED PECI driver. - Fixed typos in documents. - Combined peci-bus.txt, peci-adapter.txt and peci-client.txt into peci.txt. - Fixed and swept documents to drop some incorrect or unnecessary descriptions. - Fixed device tree to make unit-address format use reg contents. - Simplified bit manipulations using <linux/bitfield.h>. - Made client CPU model checking use <asm/intel-family.h> if available. - Modified adapter heap allocation method to use kobject reference count based. - Added the low-level PECI xfer IOCTL again to support the Redfish requirement. - Added PM domain attach/detach code. - Added logic for device instantiation through sysfs. - Fix a bug of interrupt status checking code in peci-aspeed driver. Changes since v2: - Divided peci-hwmon driver into two drivers, peci-cputemp and peci-dimmtemp. - Added generic dt binding documents for PECI bus, adapter and client. - Removed in_atomic() call from the PECI core driver. - Improved PECI commands masking logic. - Added permission check logic for PECI ioctls. - Removed unnecessary type casts. - Fixed some invalid error return codes. - Added the mark_updated() function to improve update interval checking logic. - Fixed a bug in populated DIMM checking function. - Fixed some typo, grammar and style issues in documents. - Rewrote hwmon drivers to use devm_hwmon_device_register_with_info API. - Made peci_match_id() function as a static. - Replaced a deprecated create_singlethread_workqueue() call with an alloc_ordered_workqueue() call. - Reordered local variable definitions in reversed xmas tree notation. - Listed up client CPUs that can be supported by peci-cputemp and peci-dimmtemp hwmon drivers. - Added CPU generation detection logic which checks CPUID signature through PECI connection. - Improved interrupt handling logic in the Aspeed PECI adapter driver. - Fixed SPDX license identifier style in header files. - Changed some macros in peci.h to static inline functions. - Dropped sleepable context checking code in peci-core. - Adjusted rt_mutex protection scope in peci-core. - Moved adapter->xfer() checking code into peci_register_adapter(). - Improved PECI command retry checking logic. - Changed ioctl base from 'P' to 0xb6 to avoid confiliction and updated ioctl-number.txt to reflect the ioctl number of PECI subsystem. - Added a comment to describe PECI retry action. - Simplified return code handling of peci_ioctl_ping(). - Changed type of peci_ioctl_fn[] to static const. - Fixed range checking code for valid PECI commands. - Fixed the error return code on invalid PECI commands. - Fixed incorrect definitions of PECI ioctl and its handling logic. Changes since v1: - Additionally implemented a core driver to support PECI linux bus driver model. - Modified Aspeed PECI driver to make that to be an adapter driver in PECI bus. - Modified PECI hwmon driver to make that to be a client driver in PECI bus. - Simplified hwmon driver attribute labels and removed redundant strings. - Removed core_nums from device tree setting of hwmon driver and modified core number detection logic to check the resolved_core register in client CPU's local PCI configuration area. - Removed dimm_nums from device tree setting of hwmon driver and added populated DIMM detection logic to support dynamic creation. - Removed indexing gap on core temperature and DIMM temperature attributes. - Improved hwmon registration and dynamic attribute creation logic. - Fixed structure definitions in PECI uapi header to make that use __u8, __u16 and etc. - Modified wait_for_completion_interruptible_timeout error handling logic in Aspeed PECI driver to deliver errors correctly. - Removed low-level xfer command from ioctl and kept only high-level PECI command suite as ioctls. - Fixed I/O timeout logic in Aspeed PECI driver using ktime. - Added a function into hwmon driver to simplify update delay checking. - Added a function into hwmon driver to convert 10.6 to millidegree. - Dropped non-standard attributes in hwmon driver. - Fixed OF table for hwmon to make it indicate as a PECI client of Intel CPU target. - Added a maintainer of PECI subsystem into MAINTAINERS document. Jae Hyun Yoo (12): dt-bindings: Add a document of PECI subsystem Documentation: ioctl: Add ioctl numbers for PECI subsystem peci: Add support for PECI bus driver core dt-bindings: Add a document of PECI adapter driver for ASPEED AST24xx/25xx SoCs ARM: dts: aspeed: peci: Add PECI node peci: Add a PECI adapter driver for Aspeed AST24xx/AST25xx dt-bindings: mfd: Add a document for PECI client MFD mfd: intel-peci-client: Add PECI client MFD driver Documentation: hwmon: Add documents for PECI hwmon client drivers hwmon: Add PECI cputemp driver hwmon: Add PECI dimmtemp driver Add maintainers for the PECI subsystem .../bindings/mfd/intel-peci-client.txt | 34 + .../devicetree/bindings/peci/peci-aspeed.txt | 55 + .../devicetree/bindings/peci/peci.txt | 43 + Documentation/hwmon/peci-cputemp | 78 + Documentation/hwmon/peci-dimmtemp | 50 + Documentation/ioctl/ioctl-number.txt | 2 + MAINTAINERS | 22 + arch/arm/boot/dts/aspeed-g4.dtsi | 26 + arch/arm/boot/dts/aspeed-g5.dtsi | 26 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/hwmon/Kconfig | 28 + drivers/hwmon/Makefile | 2 + drivers/hwmon/peci-cputemp.c | 394 +++++ drivers/hwmon/peci-dimmtemp.c | 284 +++ drivers/hwmon/peci-hwmon.h | 49 + drivers/mfd/Kconfig | 14 + drivers/mfd/Makefile | 1 + drivers/mfd/intel-peci-client.c | 150 ++ drivers/peci/Kconfig | 39 + drivers/peci/Makefile | 9 + drivers/peci/peci-aspeed.c | 505 ++++++ drivers/peci/peci-core.c | 1527 +++++++++++++++++ include/linux/mfd/intel-peci-client.h | 110 ++ include/linux/peci.h | 142 ++ include/uapi/linux/peci-ioctl.h | 403 +++++ 26 files changed, 3996 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/intel-peci-client.txt create mode 100644 Documentation/devicetree/bindings/peci/peci-aspeed.txt create mode 100644 Documentation/devicetree/bindings/peci/peci.txt create mode 100644 Documentation/hwmon/peci-cputemp create mode 100644 Documentation/hwmon/peci-dimmtemp create mode 100644 drivers/hwmon/peci-cputemp.c create mode 100644 drivers/hwmon/peci-dimmtemp.c create mode 100644 drivers/hwmon/peci-hwmon.h create mode 100644 drivers/mfd/intel-peci-client.c create mode 100644 drivers/peci/Kconfig create mode 100644 drivers/peci/Makefile create mode 100644 drivers/peci/peci-aspeed.c create mode 100644 drivers/peci/peci-core.c create mode 100644 include/linux/mfd/intel-peci-client.h create mode 100644 include/linux/peci.h create mode 100644 include/uapi/linux/peci-ioctl.h