From patchwork Wed Jul 25 14:38:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 949253 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=renesas.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41bHtL4QRqz9s29 for ; Thu, 26 Jul 2018 00:39:22 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729532AbeGYPvT (ORCPT ); Wed, 25 Jul 2018 11:51:19 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:53964 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728631AbeGYPvS (ORCPT ); Wed, 25 Jul 2018 11:51:18 -0400 Received: from unknown (HELO relmlir4.idc.renesas.com) ([10.200.68.154]) by relmlie2.idc.renesas.com with ESMTP; 25 Jul 2018 23:39:18 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir4.idc.renesas.com (Postfix) with ESMTP id 3B92B88E21; Wed, 25 Jul 2018 23:39:18 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.51,401,1526310000"; d="scan'208";a="287873925" Received: from unknown (HELO rtamta01.rta.renesas.com) ([143.103.48.75]) by relmlii2.idc.renesas.com with ESMTP; 25 Jul 2018 23:39:16 +0900 Received: from ubuntu.localdomain (unknown [143.103.58.206]) by rtamta01.rta.renesas.com (Postfix) with ESMTP id 50E42D5; Wed, 25 Jul 2018 14:39:11 +0000 (UTC) From: Chris Brandt To: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Geert Uytterhoeven Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Simon Horman , Chris Brandt Subject: [PATCH v2 0/3] serial: sh-sci: Add support for RZ/A2 Date: Wed, 25 Jul 2018 09:38:47 -0500 Message-Id: <20180725143850.32985-1-chris.brandt@renesas.com> X-Mailer: git-send-email 2.16.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The RZ/A2 uses a modified SCIF that until recently was only used in Renesas MCU devices (not MPU devices). So, while it functions mostly the same as a normal SCIF, some things needed to be shifted around. In the end, a standard compatible = "renesas,scif" is all that is really needed (not a SoC specific "renesas,scif-r7s9210"). Becase there is no device tree yet, here is sample of what it would look like: scif0: serial@e8007000 { compatible = "renesas,scif-r7s9210", "renesas,scif"; reg = <0xe8007000 18>; interrupts = , , , , , ; clocks = <&mstp4_clks R7S9210_CLK_SCIF0>; clock-names = "fck"; power-domains = <&cpg_clocks>; status = "disabled"; }; Chris Brandt (3): serial: sh-sci: Allow for compressed SCIF address space serial: sh-sci: Add support for separate TEI+DRI interrupts serial: sh-sci: Document r7s9210 bindings .../bindings/serial/renesas,sci-serial.txt | 17 +++++- drivers/tty/serial/sh-sci.c | 66 ++++++++++++++++++---- 2 files changed, 70 insertions(+), 13 deletions(-) Reviewed-by: Geert Uytterhoeven