Message ID | 1596855231-5782-1-git-send-email-yongqiang.niu@mediatek.com |
---|---|
Headers | show |
Series | add drm support for MT8183 | expand |
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年8月8日 週六 上午11:05寫道: > > This patch add support for mediatek SOC MT8183 > 1. add ovl private data > 2. add rdma private data > 3. add mutes private data > 4. add main and external path module for crtc create > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> [snip] > + > static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = { > { .compatible = "mediatek,mt2701-disp-ovl", > .data = &mt2701_ovl_driver_data}, > { .compatible = "mediatek,mt8173-disp-ovl", > .data = &mt8173_ovl_driver_data}, > + { .compatible = "mediatek,mt8183-disp-ovl", "mediatek,mt8183-disp-ovl" is not defined in binding document [1] [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt?h=v5.8 > + .data = &mt8183_ovl_driver_data}, > + { .compatible = "mediatek,mt8183-disp-ovl-2l", Ditto. > + .data = &mt8183_ovl_2l_driver_data}, > {}, > }; [snip] > + > static const struct of_device_id mtk_disp_rdma_driver_dt_match[] = { > { .compatible = "mediatek,mt2701-disp-rdma", > .data = &mt2701_rdma_driver_data}, > { .compatible = "mediatek,mt8173-disp-rdma", > .data = &mt8173_rdma_driver_data}, > + { .compatible = "mediatek,mt8183-disp-rdma", Ditto. > + .data = &mt8183_rdma_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, mtk_disp_rdma_driver_dt_match); [snip] > + > struct mtk_disp_mutex *mtk_disp_mutex_get(struct device *dev, unsigned int id) > { > struct mtk_ddp *ddp = dev_get_drvdata(dev); > @@ -402,6 +447,8 @@ static int mtk_ddp_remove(struct platform_device *pdev) > .data = &mt2712_ddp_driver_data}, > { .compatible = "mediatek,mt8173-disp-mutex", > .data = &mt8173_ddp_driver_data}, > + { .compatible = "mediatek,mt8183-disp-mutex", Ditto. Regards, Chun-Kuang. > + .data = &mt8183_ddp_driver_data}, > {}, > }; > MODULE_DEVICE_TABLE(of, ddp_driver_dt_match);
Hi, Yongqiang: This series is 'v8', not 'RESEND v7' Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年8月8日 週六 上午10:56寫道: > > This series are based on 5.8-rc1 and provide 7 patch > to support mediatek SOC MT8183 > > Change since v6 > - move ddp component define into mtk_mmsys.h > - add mmsys private data to support different ic path connection > - add mt8183-mmsys.c to support 8183 path connection > - fix reviewed issue in v6 > > Change since v5 > - fix reviewed issue in v5 > base https://patchwork.kernel.org/project/linux-mediatek/list/?series=213219 > > Change since v4 > - fix reviewed issue in v4 > > Change since v3 > - fix reviewed issue in v3 > - fix type error in v3 > - fix conflict with iommu patch > > Change since v2 > - fix reviewed issue in v2 > - add mutex node into dts file > > Changes since v1: > - fix reviewed issue in v1 > - add dts for mt8183 display nodes > - adjust display clock control flow in patch 22 > - add vmap support for mediatek drm in patch 23 > - fix page offset issue for mmap function in patch 24 > - enable allow_fb_modifiers for mediatek drm in patch 25 > > Yongqiang Niu (7): > dt-bindings: mediatek: add rdma_fifo_size description for mt8183 > display > drm/mediatek: move ddp component define into mtk_mmsys.h > mtk-mmsys: add mmsys private data > mtk-mmsys: add mt8183 mmsys support > drm/mediatek: add fifo_size into rdma private data > drm/mediatek: add support for mediatek SOC MT8183 > arm64: dts: add display nodes for mt8183 > > .../bindings/display/mediatek/mediatek,disp.txt | 14 ++ > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 98 ++++++++ > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 18 ++ > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 25 +- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 47 ++++ > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 34 +-- > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 43 ++++ > drivers/soc/mediatek/Makefile | 1 + > drivers/soc/mediatek/mmsys/Makefile | 3 + > drivers/soc/mediatek/mmsys/mt2701-mmsys.c | 250 +++++++++++++++++++ > drivers/soc/mediatek/mmsys/mt8183-mmsys.c | 154 ++++++++++++ > drivers/soc/mediatek/mtk-mmsys.c | 276 ++++----------------- > include/linux/soc/mediatek/mtk-mmsys.h | 48 ++++ > 13 files changed, 749 insertions(+), 262 deletions(-) > create mode 100644 drivers/soc/mediatek/mmsys/Makefile > create mode 100644 drivers/soc/mediatek/mmsys/mt2701-mmsys.c > create mode 100644 drivers/soc/mediatek/mmsys/mt8183-mmsys.c > > -- > 1.8.1.1.dirty > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年8月8日 週六 上午11:05寫道: > > mmsys is the driver which control the routing of these ddp component, > so the definition of mtk_ddp_comp_id should be placed in mtk-mmsys.h > Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 34 +---------------------------- > drivers/soc/mediatek/mtk-mmsys.c | 4 +--- > include/linux/soc/mediatek/mtk-mmsys.h | 33 ++++++++++++++++++++++++++++ > 3 files changed, 35 insertions(+), 36 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > index debe363..161201f 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h > @@ -7,6 +7,7 @@ > #define MTK_DRM_DDP_COMP_H > > #include <linux/io.h> > +#include <linux/soc/mediatek/mtk-mmsys.h> > > struct device; > struct device_node; > @@ -35,39 +36,6 @@ enum mtk_ddp_comp_type { > MTK_DDP_COMP_TYPE_MAX, > }; > > -enum mtk_ddp_comp_id { > - DDP_COMPONENT_AAL0, > - DDP_COMPONENT_AAL1, > - DDP_COMPONENT_BLS, > - DDP_COMPONENT_CCORR, > - DDP_COMPONENT_COLOR0, > - DDP_COMPONENT_COLOR1, > - DDP_COMPONENT_DITHER, > - DDP_COMPONENT_DPI0, > - DDP_COMPONENT_DPI1, > - DDP_COMPONENT_DSI0, > - DDP_COMPONENT_DSI1, > - DDP_COMPONENT_DSI2, > - DDP_COMPONENT_DSI3, > - DDP_COMPONENT_GAMMA, > - DDP_COMPONENT_OD0, > - DDP_COMPONENT_OD1, > - DDP_COMPONENT_OVL0, > - DDP_COMPONENT_OVL_2L0, > - DDP_COMPONENT_OVL_2L1, > - DDP_COMPONENT_OVL1, > - DDP_COMPONENT_PWM0, > - DDP_COMPONENT_PWM1, > - DDP_COMPONENT_PWM2, > - DDP_COMPONENT_RDMA0, > - DDP_COMPONENT_RDMA1, > - DDP_COMPONENT_RDMA2, > - DDP_COMPONENT_UFOE, > - DDP_COMPONENT_WDMA0, > - DDP_COMPONENT_WDMA1, > - DDP_COMPONENT_ID_MAX, > -}; > - > struct mtk_ddp_comp; > struct cmdq_pkt; > struct mtk_ddp_comp_funcs { > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > index a55f255..36ad66b 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -5,13 +5,11 @@ > */ > > #include <linux/device.h> > +#include <linux/io.h> > #include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/soc/mediatek/mtk-mmsys.h> > > -#include "../../gpu/drm/mediatek/mtk_drm_ddp.h" > -#include "../../gpu/drm/mediatek/mtk_drm_ddp_comp.h" > - > #define DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0x040 > #define DISP_REG_CONFIG_DISP_OVL1_MOUT_EN 0x044 > #define DISP_REG_CONFIG_DISP_OD_MOUT_EN 0x048 > diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h > index 7bab5d9..2228bf6 100644 > --- a/include/linux/soc/mediatek/mtk-mmsys.h > +++ b/include/linux/soc/mediatek/mtk-mmsys.h > @@ -9,6 +9,39 @@ > enum mtk_ddp_comp_id; > struct device; > > +enum mtk_ddp_comp_id { > + DDP_COMPONENT_AAL0, > + DDP_COMPONENT_AAL1, > + DDP_COMPONENT_BLS, > + DDP_COMPONENT_CCORR, > + DDP_COMPONENT_COLOR0, > + DDP_COMPONENT_COLOR1, > + DDP_COMPONENT_DITHER, > + DDP_COMPONENT_DPI0, > + DDP_COMPONENT_DPI1, > + DDP_COMPONENT_DSI0, > + DDP_COMPONENT_DSI1, > + DDP_COMPONENT_DSI2, > + DDP_COMPONENT_DSI3, > + DDP_COMPONENT_GAMMA, > + DDP_COMPONENT_OD0, > + DDP_COMPONENT_OD1, > + DDP_COMPONENT_OVL0, > + DDP_COMPONENT_OVL_2L0, > + DDP_COMPONENT_OVL_2L1, > + DDP_COMPONENT_OVL1, > + DDP_COMPONENT_PWM0, > + DDP_COMPONENT_PWM1, > + DDP_COMPONENT_PWM2, > + DDP_COMPONENT_RDMA0, > + DDP_COMPONENT_RDMA1, > + DDP_COMPONENT_RDMA2, > + DDP_COMPONENT_UFOE, > + DDP_COMPONENT_WDMA0, > + DDP_COMPONENT_WDMA1, > + DDP_COMPONENT_ID_MAX, > +}; > + > void mtk_mmsys_ddp_connect(struct device *dev, > enum mtk_ddp_comp_id cur, > enum mtk_ddp_comp_id next); > -- > 1.8.1.1.dirty > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
Hi, Yongqiang: Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2020年8月8日 週六 上午10:56寫道: > > the reason why split out display connection function: > 1. there will more and more Mediatek Soc upstream, and the display path > connection function mtk_mmsys_ddp_mout_en, mtk_mmsys_ddp_sel_in and > mtk_mmsys_ddp_sout_sel will complicated more and more > 2. many of the connection are only used in some SoC, and useless for > other SoC and not readable, > 3. if we add a new SoC connection, we need check is this affect other > Soc > > the reason why not apply the previous series method: > this version is more readable and clear > if go on use v6, except mt2701/mt8173/mt2712, we need add two more > private data array for mt6779 and mt6797, and the connect function > will add more if/else usecase > > move current display connection function into mt2701-mmsys.c > keep mt2701/mt8173/mt2712/mt6779/mt6797 with original version > connection function > the corresponded SoC upstream member will coding these and test it > on the SoC if it is need. > For this patch, I prefer [1]'s implementation. In [1], for each SoC, the only difference is an array for routing register setting. In this patch, the difference are three function which is more complicated than [1]. If you like, you could pick [1] to upstream. [1] https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2345186 Regards, Chun-Kuang. > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/soc/mediatek/Makefile | 1 + > drivers/soc/mediatek/mmsys/Makefile | 2 + > drivers/soc/mediatek/mmsys/mt2701-mmsys.c | 250 +++++++++++++++++++++++++++ > drivers/soc/mediatek/mtk-mmsys.c | 271 +++++------------------------- > include/linux/soc/mediatek/mtk-mmsys.h | 15 ++ > 5 files changed, 314 insertions(+), 225 deletions(-) > create mode 100644 drivers/soc/mediatek/mmsys/Makefile > create mode 100644 drivers/soc/mediatek/mmsys/mt2701-mmsys.c >
On Sat, Aug 8, 2020 at 2:53 AM Yongqiang Niu <yongqiang.niu@mediatek.com> wrote: > > add mt8183 mmsys support > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/soc/mediatek/mmsys/Makefile | 1 + > drivers/soc/mediatek/mmsys/mt8183-mmsys.c | 154 ++++++++++++++++++++++++++++++ > drivers/soc/mediatek/mtk-mmsys.c | 1 + > 3 files changed, 156 insertions(+) > create mode 100644 drivers/soc/mediatek/mmsys/mt8183-mmsys.c > > diff --git a/drivers/soc/mediatek/mmsys/Makefile b/drivers/soc/mediatek/mmsys/Makefile > index 33b0dab..62cfedf 100644 > --- a/drivers/soc/mediatek/mmsys/Makefile > +++ b/drivers/soc/mediatek/mmsys/Makefile > @@ -1,2 +1,3 @@ > # SPDX-License-Identifier: GPL-2.0-only > obj-y += mt2701-mmsys.o > +obj-y += mt8183-mmsys.o > diff --git a/drivers/soc/mediatek/mmsys/mt8183-mmsys.c b/drivers/soc/mediatek/mmsys/mt8183-mmsys.c > new file mode 100644 > index 0000000..e5170b5 > --- /dev/null > +++ b/drivers/soc/mediatek/mmsys/mt8183-mmsys.c > @@ -0,0 +1,154 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// > +// Copyright (c) 2020 MediaTek Inc. > + > +#include <linux/device.h> > +#include <linux/io.h> > +#include <linux/of_device.h> > +#include <linux/platform_device.h> > +#include <linux/soc/mediatek/mtk-mmsys.h> > + > +#define DISP_OVL0_MOUT_EN 0xf00 > +#define DISP_OVL0_2L_MOUT_EN 0xf04 > +#define DISP_OVL1_2L_MOUT_EN 0xf08 > +#define DISP_DITHER0_MOUT_EN 0xf0c > +#define DISP_PATH0_SEL_IN 0xf24 > +#define DISP_DSI0_SEL_IN 0xf2c > +#define DISP_DPI0_SEL_IN 0xf30 > +#define DISP_RDMA0_SOUT_SEL_IN 0xf50 > +#define DISP_RDMA1_SOUT_SEL_IN 0xf54 > + > +#define OVL0_MOUT_EN_OVL0_2L BIT(4) > +#define OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0) > +#define OVL1_2L_MOUT_EN_RDMA1 BIT(4) > +#define DITHER0_MOUT_IN_DSI0 BIT(0) > +#define DISP_PATH0_SEL_IN_OVL0_2L 0x1 > +#define DSI0_SEL_IN_RDMA0 0x1 > +#define DSI0_SEL_IN_RDMA1 0x3 > +#define DPI0_SEL_IN_RDMA0 0x1 > +#define DPI0_SEL_IN_RDMA1 0x2 > +#define RDMA0_SOUT_COLOR0 0x1 > +#define RDMA1_SOUT_DSI0 0x1 > + > +struct mmsys_path_sel { > + enum mtk_ddp_comp_id cur; > + enum mtk_ddp_comp_id next; > + u32 addr; > + u32 val; > +}; > + > +static struct mmsys_path_sel mmsys_mout_en[] = { > + { > + DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0, > + DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_OVL0_2L, > + }, > + { > + DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0, > + DISP_OVL0_2L_MOUT_EN, OVL0_2L_MOUT_EN_DISP_PATH0, > + }, > + { > + DDP_COMPONENT_OVL_2L1, DDP_COMPONENT_RDMA1, > + DISP_OVL1_2L_MOUT_EN, OVL1_2L_MOUT_EN_RDMA1, > + }, > + { > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0, > + DISP_DITHER0_MOUT_EN, DITHER0_MOUT_IN_DSI0, > + }, > +}; > + > +static struct mmsys_path_sel mmsys_sel_in[] = { > + { > + DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0, > + DISP_PATH0_SEL_IN, DISP_PATH0_SEL_IN_OVL0_2L, > + }, > + { > + DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0, > + DISP_DPI0_SEL_IN, DPI0_SEL_IN_RDMA1, > + }, > +}; > + > +static struct mmsys_path_sel mmsys_sout_sel[] = { > + { > + DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0, > + DISP_RDMA0_SOUT_SEL_IN, RDMA0_SOUT_COLOR0, > + }, > +}; > + > +static unsigned int mtk_mmsys_ddp_mout_en(enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next, > + unsigned int *addr) > +{ > + u32 i; > + struct mmsys_path_sel *path; > + > + for (i = 0; i < ARRAY_SIZE(mmsys_mout_en); i++) { > + path = &mmsys_mout_en[i]; > + if (cur == path->cur && next == path->next) { > + *addr = path->addr; > + return path->val; > + } > + } > + > + return 0; > +} > + > +static unsigned int mtk_mmsys_ddp_sel_in(enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next, > + unsigned int *addr) > +{ > + u32 i; > + struct mmsys_path_sel *path; > + > + for (i = 0; i < ARRAY_SIZE(mmsys_sel_in); i++) { > + path = &mmsys_sel_in[i]; > + if (cur == path->cur && next == path->next) { > + *addr = path->addr; > + return path->val; > + } > + } > + > + return 0; > +} > + > +static void mtk_mmsys_ddp_sout_sel(void __iomem *config_regs, > + enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next) > +{ > + u32 i; > + u32 val = 0; This variable is unused. > + u32 addr = 0; > + struct mmsys_path_sel *path; > + > + for (i = 0; i < ARRAY_SIZE(mmsys_sout_sel); i++) { > + path = &mmsys_sout_sel[i]; > + if (cur == path->cur && next == path->next) { > + addr = path->addr; > + writel_relaxed(path->val, config_regs + addr); > + return; > + } > + } > +} > + > +static struct mtk_mmsys_conn_funcs mmsys_funcs = { > + .mout_en = mtk_mmsys_ddp_mout_en, > + .sel_in = mtk_mmsys_ddp_sel_in, > + .sout_sel = mtk_mmsys_ddp_sout_sel, > +}; > + > +static int mmsys_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + > + mtk_mmsys_register_conn_funcs(dev->parent, &mmsys_funcs); > + > + return 0; > +} > + > +static struct platform_driver mmsys_drv = { > + .probe = mmsys_probe, > + .driver = { > + .name = "mt8183-mmsys", > + }, > +}; > + > +builtin_platform_driver(mmsys_drv); > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > index 605b992..6a451ac 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -47,6 +47,7 @@ struct mtk_mmsys_private_data { > > static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { > .clk_driver = "clk-mt8183-mm", > + .mmsys_driver = "mt8183-mmsys", > }; > > void mtk_mmsys_ddp_connect(struct device *dev,