[v5,0/5] Add SS/HS-USB changes for Qualcomm SM8150 chipset

This series adds support for the Synopsis 7nm HSPHY USB driver being
used in QCOM chipsets.  The HSPHY register map differs compared to 
other PHY revisions.  In addition, modifications and updates are done
to the QMP driver to add new registers/offsets, and to update the
initialization sequence for enabling the SSUSB path on SM8150.

Changes in v5:
 - Reorganize IF check for when to use the proper PWRDOWN CTRL offset
 - Rename UFS specific offset definitions in the QMP PHY driver to clearly
   denote they are UFS specific
 - Rename the phy-qcom-snps-7nm driver to phy-qcom-snps-femto-v2

Changes in v4:
 - Fix POWERDOWN offset for QMP PHY exit routine, and check for
   has_phy_dp_com_ctrl instead of !has_phy_com_ctrl

Changes in v3:
 - Use devm_reset_control_get_exclusive instead of referencing index for
   reset handle

Changes in v2:
 - Fixed YAML errors caught by dt_binding_check

Jack Pham (1):
  phy: qcom-qmp: Add SM8150 QMP USB3 PHY support

Wesley Cheng (4):
  dt-bindings: phy: Add binding for qcom,usb-snps-femto-v2
  phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs
  phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB
  phy: qcom-qmp: Rename UFS PCS QMP v4 registers

 .../bindings/phy/qcom,usb-snps-femto-v2.yaml       |  77 ++++++
 drivers/phy/qualcomm/Kconfig                       |  10 +
 drivers/phy/qualcomm/Makefile                      |   1 +
 drivers/phy/qualcomm/phy-qcom-qmp.c                | 193 ++++++++++++-
 drivers/phy/qualcomm/phy-qcom-qmp.h                | 238 +++++++++++++++--
 drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c      | 297 +++++++++++++++++++++
 6 files changed, 780 insertions(+), 36 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
 create mode 100644 drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

On 02-04-20, 19:23, Wesley Cheng wrote:
> This adds the SNPS FemtoPHY V2 driver used in QCOM SOCs.  There
> are potentially multiple instances of this UTMI PHY on the
> SOC, all which can utilize this driver.  The V2 driver will
> have a different register map compared to V1.

Some nitpicks below, otherwise:

Reviewed-by: Vinod Koul <vkoul@kernel.org>

> +/**
> + * struct qcom_snps_hsphy - structure holding snps hs phy attributes
> + *
> + * @phy: generic phy
> + * @base: iomapped memory space for qubs2 phy
> + *
> + * @cfg_ahb_clk: AHB2PHY interface clock
> + * @ref_clk: phy reference clock
> + * @iface_clk: phy interface clock
> + * @phy_reset: phy reset control
> + * @vregs: regulator supplies bulk data
> +

This is missing the marker * for kernel doc

> + * @phy_initialized: if PHY has been initialized correctly
> + *

This empty line is redundant

> + */
> +struct qcom_snps_hsphy {
> +	struct phy *phy;
> +	void __iomem *base;
> +
> +	struct clk *cfg_ahb_clk;
> +	struct clk *ref_clk;
> +	struct reset_control *phy_reset;
> +	struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS];
> +
> +	bool phy_initialized;
> +};
> +
> +static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset,
> +				    u32 mask, u32 val)

coding style mandates that second line should start at preceeding line
opening brace :), so can you please make it:

static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset,
                                              u32 mask, u32 val)

Hi Vinod,

Thanks for the review, I'll address these in the next version.

On 4/2/2020 11:01 PM, Vinod Koul wrote:
> On 02-04-20, 19:23, Wesley Cheng wrote:
>> This adds the SNPS FemtoPHY V2 driver used in QCOM SOCs.  There
>> are potentially multiple instances of this UTMI PHY on the
>> SOC, all which can utilize this driver.  The V2 driver will
>> have a different register map compared to V1.
> 
> Some nitpicks below, otherwise:
> 
> Reviewed-by: Vinod Koul <vkoul@kernel.org>
> 
>> +/**
>> + * struct qcom_snps_hsphy - structure holding snps hs phy attributes
>> + *
>> + * @phy: generic phy
>> + * @base: iomapped memory space for qubs2 phy
>> + *
>> + * @cfg_ahb_clk: AHB2PHY interface clock
>> + * @ref_clk: phy reference clock
>> + * @iface_clk: phy interface clock
>> + * @phy_reset: phy reset control
>> + * @vregs: regulator supplies bulk data
>> +
> 
> This is missing the marker * for kernel doc
> 
>> + * @phy_initialized: if PHY has been initialized correctly
>> + *
> 
> This empty line is redundant
> 
>> + */
>> +struct qcom_snps_hsphy {
>> +	struct phy *phy;
>> +	void __iomem *base;
>> +
>> +	struct clk *cfg_ahb_clk;
>> +	struct clk *ref_clk;
>> +	struct reset_control *phy_reset;
>> +	struct regulator_bulk_data vregs[SNPS_HS_NUM_VREGS];
>> +
>> +	bool phy_initialized;
>> +};
>> +
>> +static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset,
>> +				    u32 mask, u32 val)
> 
> coding style mandates that second line should start at preceeding line
> opening brace :), so can you please make it:
> 
> static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset,
>                                               u32 mask, u32 val)
>