mbox series

[v3,0/4] Fix Wake on lan with FEC on i.MX6

Message ID 1585835490-3813-1-git-send-email-martin.fuzzey@flowbird.group
Headers show
Series Fix Wake on lan with FEC on i.MX6 | expand

Message

Martin Fuzzey April 2, 2020, 1:51 p.m. UTC
This series fixes WoL support with the FEC on i.MX6
The support was already in mainline but seems to have bitrotted
somewhat.

Only tested with i.MX6DL

Changes V2->V3
	Patch 1:
		fix non initialized variable introduced in V2 causing
		probe to sometimes fail.

	Patch 2:
		remove /delete-property/interrupts-extended in
		arch/arm/boot/dts/imx6qp.dtsi.

	Patches 3 and 4:
		Add received Acked-by and RB tags.

Changes V1->V2
	Move the register offset and bit number from the DT to driver code
	Add SOB from Fugang Duan for the NXP code on which this is based

Martin Fuzzey (4):
  net: fec: set GPR bit on suspend by DT configuration.
  ARM: dts: imx6: Use gpc for FEC interrupt controller to fix wake on
    LAN.
  dt-bindings: fec: document the new gpr property.
  ARM: dts: imx6: add fec gpr property.

 Documentation/devicetree/bindings/net/fsl-fec.txt |   2 +
 arch/arm/boot/dts/imx6qdl.dtsi                    |   6 +-
 arch/arm/boot/dts/imx6qp.dtsi                     |   1 -
 drivers/net/ethernet/freescale/fec.h              |   7 +
 drivers/net/ethernet/freescale/fec_main.c         | 149 +++++++++++++++++-----
 5 files changed, 132 insertions(+), 33 deletions(-)

--
1.9.1

Comments

David Miller April 8, 2020, 1:24 a.m. UTC | #1
From: Martin Fuzzey <martin.fuzzey@flowbird.group>
Date: Thu,  2 Apr 2020 15:51:26 +0200

> This series fixes WoL support with the FEC on i.MX6
> The support was already in mainline but seems to have bitrotted
> somewhat.
> 
> Only tested with i.MX6DL
> 
> Changes V2->V3
> 	Patch 1:
> 		fix non initialized variable introduced in V2 causing
> 		probe to sometimes fail.
> 
> 	Patch 2:
> 		remove /delete-property/interrupts-extended in
> 		arch/arm/boot/dts/imx6qp.dtsi.
> 
> 	Patches 3 and 4:
> 		Add received Acked-by and RB tags.
> 
> Changes V1->V2
> 	Move the register offset and bit number from the DT to driver code
> 	Add SOB from Fugang Duan for the NXP code on which this is based

Series applied, thanks.