From patchwork Fri Feb 14 18:02:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 1238272 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=wanyeetech.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48K1V73W4HzB46G for ; Sat, 15 Feb 2020 05:04:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391042AbgBNSEH (ORCPT ); Fri, 14 Feb 2020 13:04:07 -0500 Received: from out28-53.mail.aliyun.com ([115.124.28.53]:43634 "EHLO out28-53.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731649AbgBNSDi (ORCPT ); Fri, 14 Feb 2020 13:03:38 -0500 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.1047515|-1; CH=green; DM=CONTINUE|CONTINUE|true|0.631285-0.0601629-0.308552; DS=CONTINUE|ham_system_inform|0.0697978-0.000392505-0.92981; FP=0|0|0|0|0|-1|-1|-1; HT=e02c03311; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=27; RT=27; SR=0; TI=SMTPD_---.GoAKeCh_1581703384; Received: from localhost.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.GoAKeCh_1581703384) by smtp.aliyun-inc.com(10.147.42.253); Sat, 15 Feb 2020 02:03:21 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: linux-mips@vger.kernel.org Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, paul@crapouillou.net, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, ralf@linux-mips.org, paulburton@kernel.org, jiaxun.yang@flygoat.com, chenhc@lemote.com, allison@lohutok.net, tglx@linutronix.de, daniel.lezcano@linaro.org, geert+renesas@glider.be, krzk@kernel.org, keescook@chromium.org, ebiederm@xmission.com, miquel.raynal@bootlin.com, paul@boddie.org.uk, hns@goldelico.com, sernia.zhou@foxmail.com, zhenwenjin@gmail.com, mips-creator-ci20-dev@googlegroups.com, 1326991897@qq.com Subject: [PATCH v4 0/6] Introduce SMP support for JZ4780. Date: Sat, 15 Feb 2020 02:02:34 +0800 Message-Id: <1581703360-112557-2-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1581703360-112557-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1581703360-112557-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Introduce SMP support for MIPS Creator CI20, which is based on Ingenic JZ4780 SoC. 周琰杰 (Zhou Yanjie) (6): MIPS: JZ4780: Introduce SMP support. clocksource: Ingenic: Add high resolution timer support for SMP. dt-bindings: MIPS: Document Ingenic SoCs binding. MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs. MIPS: CI20: Modify DTS to support high resolution timer for SMP. MIPS: CI20: Update defconfig to support SMP. .../bindings/mips/ingenic/ingenic,cpu.yaml | 53 ++++ .../bindings/mips/ingenic/ingenic,soc.yaml | 35 +++ arch/mips/boot/dts/ingenic/ci20.dts | 11 +- arch/mips/boot/dts/ingenic/jz4740.dtsi | 14 + arch/mips/boot/dts/ingenic/jz4770.dtsi | 15 +- arch/mips/boot/dts/ingenic/jz4780.dtsi | 23 ++ arch/mips/boot/dts/ingenic/x1000.dtsi | 14 + arch/mips/configs/ci20_defconfig | 2 + arch/mips/include/asm/mach-jz4740/jz4780-smp.h | 91 +++++++ arch/mips/jz4740/Kconfig | 3 + arch/mips/jz4740/Makefile | 5 + arch/mips/jz4740/prom.c | 4 + arch/mips/jz4740/smp-entry.S | 57 ++++ arch/mips/jz4740/smp.c | 286 +++++++++++++++++++++ arch/mips/kernel/idle.c | 14 +- drivers/clk/ingenic/jz4780-cgu.c | 58 ++++- drivers/clocksource/ingenic-timer.c | 200 +++++++++----- 17 files changed, 810 insertions(+), 75 deletions(-) create mode 100755 Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml create mode 100755 Documentation/devicetree/bindings/mips/ingenic/ingenic,soc.yaml create mode 100644 arch/mips/include/asm/mach-jz4740/jz4780-smp.h create mode 100644 arch/mips/jz4740/smp-entry.S create mode 100644 arch/mips/jz4740/smp.c